Lines Matching defs:RegVT

5657   const MVT RegVT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32;
5661   SDValue LoadFuncPtr = DAG.getLoad(RegVT, dl, LDChain, Callee, MPI,
5667   SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, Callee, TOCOff);
5669       DAG.getLoad(RegVT, dl, LDChain, AddTOC,
5674   SDValue AddPtr = DAG.getNode(ISD::ADD, dl, RegVT, Callee, PtrOff);
5676       DAG.getLoad(RegVT, dl, LDChain, AddPtr,
5709   const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32;
5732       SDValue StackPtr = DAG.getRegister(StackPtrReg, RegVT);
5735       SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, StackPtr, TOCOff);
5742                                     RegVT));
5747       Ops.push_back(DAG.getRegister(IsPPC64 ? PPC::CTR8 : PPC::CTR, RegVT));
5765     Ops.push_back(DAG.getRegister(Subtarget.getTOCPointerRegister(), RegVT));
6852   const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32;
6887                                        State.getStackSize(), RegVT, LocInfo));
6908         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo));
6931     if (ValVT.getFixedSizeInBits() < RegVT.getFixedSizeInBits())
6935       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo));
6937       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, RegVT, LocInfo));
6963               CCValAssign::getCustomReg(ValNo, ValVT, Reg, RegVT, LocInfo));
7059           CCValAssign::getCustomReg(ValNo, ValVT, FirstReg, RegVT, LocInfo));
7061           CCValAssign::getCustomReg(ValNo, ValVT, SecondReg, RegVT, LocInfo));
7075           CCValAssign::getCustomReg(ValNo, ValVT, Reg, RegVT, LocInfo));