Lines Matching defs:PPCTargetLowering
170 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
1549 void PPCTargetLowering::initializeAddrModeMap() {
1628 uint64_t PPCTargetLowering::getByValTypeAlignment(Type *Ty,
1638 bool PPCTargetLowering::useSoftFloat() const {
1642 bool PPCTargetLowering::hasSPE() const {
1646 bool PPCTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const {
1650 bool PPCTargetLowering::shallExtractConstSplatVectorElementToStore(
1671 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
1844 EVT PPCTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &C,
1852 bool PPCTargetLowering::enableAggressiveFMAFusion(EVT VT) const {
2670 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
2705 bool PPCTargetLowering::SelectAddressRegReg(
2796 bool PPCTargetLowering::SelectAddressRegImm(
2901 bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp,
2950 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
2988 bool PPCTargetLowering::SelectAddressPCRel(SDValue N, SDValue &Base) const {
3048 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
3176 SDValue PPCTargetLowering::getTOCEntry(SelectionDAG &DAG, const SDLoc &dl,
3191 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
3232 unsigned PPCTargetLowering::getJumpTableEncoding() const {
3239 bool PPCTargetLowering::isJumpTableRelative() const {
3247 SDValue PPCTargetLowering::getPICJumpTableRelocBase(SDValue Table,
3263 PPCTargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
3278 SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
3315 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
3353 SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
3409 SDValue PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
3549 SDValue PPCTargetLowering::LowerGlobalTLSAddressLinux(SDValue Op,
3677 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
3726 SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
3802 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
3901 SDValue PPCTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
3912 SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,
3920 SDValue PPCTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
3971 SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
4010 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
4213 SDValue PPCTargetLowering::LowerFormalArguments(
4228 SDValue PPCTargetLowering::LowerFormalArguments_32SVR4(
4479 SDValue PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags,
4493 SDValue PPCTargetLowering::LowerFormalArguments_64SVR4(
5049 bool PPCTargetLowering::IsEligibleForTailCallOptimization_64SVR4(
5136 bool PPCTargetLowering::IsEligibleForTailCallOptimization(
5256 SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(
5345 SDValue PPCTargetLowering::LowerCallResult(
5439 static unsigned getCallOpcode(PPCTargetLowering::CallFlags CFlags,
5702 PPCTargetLowering::CallFlags CFlags, const SDLoc &dl,
5783 SDValue PPCTargetLowering::FinishCall(
5853 bool PPCTargetLowering::supportsTailCallFor(const CallBase *CB) const {
5874 bool PPCTargetLowering::isEligibleForTCO(
5893 PPCTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
5970 SDValue PPCTargetLowering::LowerCall_32SVR4(
5977 // See PPCTargetLowering::LowerFormalArguments_32SVR4() for a description
6209 SDValue PPCTargetLowering::createMemcpyOutsideCallSeq(
6224 SDValue PPCTargetLowering::LowerCall_64SVR4(
7187 SDValue PPCTargetLowering::LowerFormalArguments_AIX(
7486 SDValue PPCTargetLowering::LowerCall_AIX(
7493 // See PPCTargetLowering::LowerFormalArguments_AIX() for a description of the
7808 PPCTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
7821 PPCTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
7886 PPCTargetLowering::LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op,
7902 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op,
7930 SDValue PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG &DAG) const {
7953 PPCTargetLowering::getFramePointerFrameIndex(SelectionDAG & DAG) const {
7975 SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
7997 SDValue PPCTargetLowering::LowerEH_DWARF_CFA(SDValue Op,
8008 SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
8016 SDValue PPCTargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
8023 SDValue PPCTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
8048 SDValue PPCTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
8071 SDValue PPCTargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
8079 SDValue PPCTargetLowering::LowerTRUNCATEVector(SDValue Op,
8162 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
8370 void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
8417 SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op,
8428 SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
8536 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT,
8594 void PPCTargetLowering::spliceIntoChain(SDValue ResChain,
8614 bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
8673 SDValue PPCTargetLowering::LowerINT_TO_FPDirectMove(SDValue Op,
8710 SDValue PPCTargetLowering::LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
8770 SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
9028 SDValue PPCTargetLowering::LowerGET_ROUNDING(SDValue Op,
9100 SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9129 SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9158 SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const {
9187 SDValue PPCTargetLowering::LowerFunnelShift(SDValue Op,
9336 SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
9452 SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
9828 SDValue PPCTargetLowering::lowerToVINSERTB(ShuffleVectorSDNode *N,
9929 SDValue PPCTargetLowering::lowerToVINSERTH(ShuffleVectorSDNode *N,
10041 SDValue PPCTargetLowering::lowerToXXSPLTI32DX(ShuffleVectorSDNode *SVN,
10116 SDValue PPCTargetLowering::LowerROTL(SDValue Op, SelectionDAG &DAG) const {
10146 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
10441 SDValue PPCTargetLowering::LowerVPERM(SDValue Op, SelectionDAG &DAG,
10860 SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
11170 SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
11201 SDValue PPCTargetLowering::LowerBSWAP(SDValue Op, SelectionDAG &DAG) const {
11221 SDValue PPCTargetLowering::LowerATOMIC_CMP_SWAP(SDValue Op,
11255 SDValue PPCTargetLowering::LowerATOMIC_LOAD_STORE(SDValue Op,
11445 SDValue PPCTargetLowering::LowerIS_FPCLASS(SDValue Op,
11455 SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
11471 SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
11536 SDValue PPCTargetLowering::LowerVectorLoad(SDValue Op,
11581 SDValue PPCTargetLowering::LowerVectorStore(SDValue Op,
11641 SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {
11705 SDValue PPCTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
11715 SDValue PPCTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
11793 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
11887 void PPCTargetLowering::ReplaceNodeResults(SDNode *N,
12003 Instruction *PPCTargetLowering::emitLeadingFence(IRBuilderBase &Builder,
12013 Instruction *PPCTargetLowering::emitTrailingFence(IRBuilderBase &Builder,
12033 PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
12208 MachineBasicBlock *PPCTargetLowering::EmitPartwordAtomicBinary(
12423 PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
12565 PPCTargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
12666 bool PPCTargetLowering::hasInlineStackProbe(const MachineFunction &MF) const {
12674 unsigned PPCTargetLowering::getStackProbeSize(const MachineFunction &MF) const {
12696 PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
12896 PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
13702 SDValue PPCTargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,
13732 PPCTargetLowering::getSqrtResultForDenormInput(SDValue Op,
13743 SDValue PPCTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
13763 SDValue PPCTargetLowering::getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
13778 unsigned PPCTargetLowering::combineRepeatedFPDivisors() const {
14030 SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
14070 SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
14346 SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
14622 SDValue PPCTargetLowering::combineSetCC(SDNode *N,
14668 SDValue PPCTargetLowering::
15026 SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
15117 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
15226 SDValue PPCTargetLowering::expandVSXLoadForLE(SDNode *N,
15292 SDValue PPCTargetLowering::expandVSXStoreForLE(SDNode *N,
15355 SDValue PPCTargetLowering::combineStoreFPToInt(SDNode *N,
15515 SDValue PPCTargetLowering::combineVectorShuffle(ShuffleVectorSDNode *SVN,
15693 SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
15777 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
16572 PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
16605 void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
16660 Align PPCTargetLowering::getPrefLoopAlignment(MachineLoop *ML) const {
16711 PPCTargetLowering::ConstraintType
16712 PPCTargetLowering::getConstraintType(StringRef Constraint) const {
16746 PPCTargetLowering::getSingleConstraintMatchWeight(
16802 PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
16935 void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
17010 void PPCTargetLowering::CollectTargetIntrinsicOperands(const CallInst &I,
17028 bool PPCTargetLowering::isLegalAddressingMode(const DataLayout &DL,
17071 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op,
17111 SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
17141 Register PPCTargetLowering::getRegisterByName(const char* RegName, LLT VT,
17160 bool PPCTargetLowering::isAccessedAsGotIndirect(SDValue GA) const {
17187 PPCTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
17192 bool PPCTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
17349 EVT PPCTargetLowering::getOptimalMemOpType(
17379 bool PPCTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
17387 bool PPCTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
17395 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
17403 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
17423 bool PPCTargetLowering::isFPExtFree(EVT DestVT, EVT SrcVT) const {
17432 bool PPCTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
17436 bool PPCTargetLowering::isLegalAddImmediate(int64_t Imm) const {
17440 bool PPCTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, unsigned, Align,
17478 bool PPCTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
17505 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
17511 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
17527 bool PPCTargetLowering::isProfitableToHoist(Instruction *I) const {
17579 PPCTargetLowering::getScratchRegisters(CallingConv::ID) const {
17591 Register PPCTargetLowering::getExceptionPointerRegister(
17596 Register PPCTargetLowering::getExceptionSelectorRegister(
17602 PPCTargetLowering::shouldExpandBuildVectorWithShuffles(
17613 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {
17622 PPCTargetLowering::createFastISel(FunctionLoweringInfo &FuncInfo,
17640 SDValue PPCTargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
17706 bool PPCTargetLowering::useLoadStackGuardNode() const {
17714 void PPCTargetLowering::insertSSPDeclarations(Module &M) const {
17724 Value *PPCTargetLowering::getSDagStackGuard(const Module &M) const {
17730 bool PPCTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
17795 SDValue PPCTargetLowering::combineSHL(SDNode *N, DAGCombinerInfo &DCI) const {
17825 SDValue PPCTargetLowering::combineSRA(SDNode *N, DAGCombinerInfo &DCI) const {
17832 SDValue PPCTargetLowering::combineSRL(SDNode *N, DAGCombinerInfo &DCI) const {
17970 SDValue PPCTargetLowering::combineADD(SDNode *N, DAGCombinerInfo &DCI) const {
17989 SDValue PPCTargetLowering::combineTRUNCATE(SDNode *N,
18032 SDValue PPCTargetLowering::combineMUL(SDNode *N, DAGCombinerInfo &DCI) const {
18120 SDValue PPCTargetLowering::combineFMALike(SDNode *N,
18155 bool PPCTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {
18185 bool PPCTargetLowering::
18204 PPC::AddrMode PPCTargetLowering::getAddrModeForFlags(unsigned Flags) const {
18320 unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
18438 PPC::AddrMode PPCTargetLowering::SelectForceXFormMode(SDValue N, SDValue &Disp,
18472 bool PPCTargetLowering::splitValueIntoRegisterParts(
18490 SDValue PPCTargetLowering::lowerToLibCall(const char *LibCallName, SDValue Op,
18529 SDValue PPCTargetLowering::lowerLibCallBasedOnType(
18541 bool PPCTargetLowering::isLowringToMASSFiniteSafe(SDValue Op) const {
18547 bool PPCTargetLowering::isLowringToMASSSafe(SDValue Op) const {
18551 bool PPCTargetLowering::isScalarMASSConversionEnabled() const {
18555 SDValue PPCTargetLowering::lowerLibCallBase(const char *LibCallDoubleName,
18572 SDValue PPCTargetLowering::lowerPow(SDValue Op, SelectionDAG &DAG) const {
18577 SDValue PPCTargetLowering::lowerSin(SDValue Op, SelectionDAG &DAG) const {
18582 SDValue PPCTargetLowering::lowerCos(SDValue Op, SelectionDAG &DAG) const {
18587 SDValue PPCTargetLowering::lowerLog(SDValue Op, SelectionDAG &DAG) const {
18592 SDValue PPCTargetLowering::lowerLog10(SDValue Op, SelectionDAG &DAG) const {
18597 SDValue PPCTargetLowering::lowerExp(SDValue Op, SelectionDAG &DAG) const {
18616 PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
18751 CCAssignFn *PPCTargetLowering::ccAssignFnForCall(CallingConv::ID CC,
18762 bool PPCTargetLowering::shouldInlineQuadwordAtomics() const {
18767 PPCTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
18784 PPCTargetLowering::shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const {
18813 Value *PPCTargetLowering::emitMaskedAtomicRMWIntrinsic(
18835 Value *PPCTargetLowering::emitMaskedAtomicCmpXchgIntrinsic(