Lines Matching defs:R0
426 - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
430 - If the defaults (R0/R12) are available, return true
448 Register R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0;
453 *SR1 = R0;
460 // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
481 // Note that we only return here if both R0 and R12 are available because
484 if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
998 // which could be R0, and R0 cannot be used as a base address.
1006 if (ScratchReg == PPC::R0) {
1007 // R0 cannot be used as a base register, but it can be used as an
1011 // R0 += (FPOffset-LastOffset).
1012 // Need addic, since addi treats R0 as 0.
1017 // Store FP into *R0.
1021 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1024 // R0 += (PBPOffset-LastOffset).
1032 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1035 // R0 += (BPOffset-LastOffset).
1043 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1044 // BP = R0-LastOffset
1050 // ScratchReg is not R0, so use it as the base register. It is
1753 // could happen to be R0. Use FP instead, but make sure to preserve it.
1789 // a base register anyway, because it may happen to be R0.
2571 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0;