Lines Matching defs:SrcVT

167     bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
824   MVT SrcVT = SrcEVT.getSimpleVT();
826   if (SrcVT == MVT::i1 && Subtarget->useCRBits())
840     if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 ||
841         SrcVT == MVT::i8 || SrcVT == MVT::i1) {
867   switch (SrcVT.SimpleTy) {
932     if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt))
938       if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt))
957   EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
960   if (SrcVT != MVT::f32 || DestVT != MVT::f64)
975   EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
978   if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1017 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg,
1021   if (SrcVT == MVT::i32) {
1041   if (SrcVT == MVT::i32) {
1076   MVT SrcVT = SrcEVT.getSimpleVT();
1078   if (SrcVT != MVT::i8  && SrcVT != MVT::i16 &&
1079       SrcVT != MVT::i32 && SrcVT != MVT::i64)
1116   if (SrcVT == MVT::i8 || SrcVT == MVT::i16) {
1118     if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned))
1120     SrcVT = MVT::i64;
1125   unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned);
1188   MVT DstVT, SrcVT;
1203   if (!isTypeLegal(SrcTy, SrcVT))
1206   if (SrcVT != MVT::f32 && SrcVT != MVT::f64)
1805 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1809   if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32)
1815     if (SrcVT == MVT::i8)
1817     else if (SrcVT == MVT::i16)
1829     if (SrcVT == MVT::i8)
1832       assert(SrcVT == MVT::i16 && "Unsigned extend from i32 to i32??");
1842     if (SrcVT == MVT::i8)
1844     else if (SrcVT == MVT::i16)
1876   EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
1879   if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16)
1890   if (SrcVT == MVT::i64)
1915   MVT SrcVT = SrcEVT.getSimpleVT();
1929   if (!PPCEmitIntExt(SrcVT, SrcReg, DestVT, ResultReg, IsZExt))