Lines Matching defs:DestReg

158                     bool isZExt, unsigned DestReg,
168 unsigned DestReg, bool IsZExt);
818 bool IsZExt, unsigned DestReg,
945 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(CmpOpc), DestReg)
948 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(CmpOpc), DestReg)
986 unsigned DestReg;
989 DestReg = createResultReg(&PPC::GPRCRegClass);
991 DestReg)
994 DestReg = createResultReg(&PPC::VSSRCRegClass);
996 DestReg)
1000 DestReg = createResultReg(&PPC::F4RCRegClass);
1002 TII.get(PPC::FRSP), DestReg)
1006 updateValueMap(I, DestReg);
1094 Register DestReg = createResultReg(&PPC::SPERCRegClass);
1096 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
1098 updateValueMap(I, DestReg);
1131 Register DestReg = createResultReg(RC);
1140 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
1143 updateValueMap(I, DestReg);
1223 unsigned DestReg;
1228 DestReg = createResultReg(&PPC::GPRCRegClass);
1234 DestReg = createResultReg(&PPC::VSFRCRegClass);
1240 DestReg = createResultReg(&PPC::F8RCRegClass);
1251 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
1256 ? DestReg
1257 : PPCMoveToIntReg(I, DstVT, DestReg, IsSigned);
1802 // Attempt to emit an integer extend of SrcReg into DestReg. Both
1806 unsigned DestReg, bool IsZExt) {
1823 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
1836 DestReg)
1849 TII.get(PPC::RLDICL_32_64), DestReg)
2004 Register DestReg = createResultReg(RC);
2026 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
2038 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
2042 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
2048 return DestReg;
2060 Register DestReg = createResultReg(RC);
2084 IsAIXTocData ? TII.get(PPC::ADDItoc8) : TII.get(PPC::LDtoc), DestReg);
2105 DestReg).addGlobalAddress(GV).addReg(HighPartReg);
2109 DestReg)
2115 return DestReg;