Lines Matching defs:Dest0

53                        Register Dest0, Register Dest1, Register Src0,
57   if (Dest0 == Src1 && Dest1 == Src0) {
59     BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1);
60     BuildMI(MBB, MBBI, DL, XOR, Dest1).addReg(Dest0).addReg(Dest1);
61     BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1);
62   } else if (Dest0 != Src0 || Dest1 != Src1) {
63     if (Dest0 == Src1 || Dest1 != Src0) {
65       BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0);
67       BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0);