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1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
16 //===----------------------------------------------------------------------===//
99 "aix-ssp-tb-bit", cl::init(false),
161 // non-TOC-based local-exec variables.
209 int64_t Offset);
218 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
252 // This is used for AIX's extra-label-at-definition aliasing strategy.
263 // Get the offset of an alias based on its AliaseeObject.
269 if (MAI->isLittleEndian())
271 "cannot create AIX PPC Assembly Printer for a little-endian target");
312 getSymbol(GV)->print(O, MAI);
319 const MachineOperand &MO = MI->getOperand(OpNo);
327 // FIXME - What about special registers used in mfspr/mtspr?
336 MO.getMBB()->getSymbol()->print(O, MAI);
343 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
356 /// PrintAsmOperand - Print out an operand for an inline asm expression.
370 if (!MI->getOperand(OpNo).isReg() ||
371 OpNo+1 == MI->getNumOperands() ||
372 !MI->getOperand(OpNo+1).isReg())
374 ++OpNo; // Return the high-part.
379 if (MI->getOperand(OpNo).isImm())
383 if(!MI->getOperand(OpNo).isReg())
387 Register Reg = MI->getOperand(OpNo).getReg();
389 Reg = PPC::VSX32 + (Reg - PPC::V0);
391 Reg = PPC::VSX32 + (Reg - PPC::VF0);
420 case 'y': // A memory reference for an X-form instruction
427 if (MI->getOperand(OpNo).isImm())
434 // This is bad even for offset forms, since even if we know we
435 // have a value in -16(r1), we will generate a load into r<n>
438 assert(MI->getOperand(OpNo).isReg());
443 assert(MI->getOperand(OpNo).isReg());
496 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Large);
499 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Small);
506 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
525 auto &Ctx = OutStreamer->getContext();
527 OutStreamer->emitLabel(MILabel);
537 if (MII == MBB.end() || MII->isCall() ||
538 MII->getOpcode() == PPC::DBG_VALUE ||
539 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
540 MII->getOpcode() == TargetOpcode::STACKMAP)
543 NumNOPBytes -= 4;
554 auto &Ctx = OutStreamer->getContext();
556 OutStreamer->emitLabel(MILabel);
592 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
601 if (!Subtarget->isELFv2ABI()) {
647 assert((NumBytes - EncodedBytes) % 4 == 0 &&
654 /// will create the csect and use the qual-name symbol instead of creating just
673 ->getQualNameSymbol();
677 assert(Subtarget->isAIXABI() &&
680 MCSymbol *TlsCall = createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode());
686 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
693 assert(MI->getNumOperands() >= 3 && "Expecting at least 3 operands from MI");
694 if (MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||
695 MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSLD_PCREL_FLAG) {
699 const Module *M = MF->getFunction().getParent();
701 assert(MI->getOperand(0).isReg() &&
702 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
703 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
705 assert(MI->getOperand(1).isReg() &&
706 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
707 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
710 if (Subtarget->isAIXABI()) {
711 // For TLSGD, the variable offset should already be in R4 and the region
715 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
717 assert((MI->getOpcode() == PPC::GETtlsMOD32AIX ||
718 MI->getOpcode() == PPC::GETtlsMOD64AIX ||
719 (MI->getOperand(2).isReg() &&
720 MI->getOperand(2).getReg() == VarOffsetReg)) &&
728 if (Subtarget->is32BitELFABI() && isPositionIndependent())
734 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
735 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&
736 M->getPICLevel() == PICLevel::BigPIC)
739 const MachineOperand &MO = MI->getOperand(2);
744 MCInstBuilder(Subtarget->isPPC64() ? Opcode
750 /// Map a machine operand for a TOC pseudo-machine instruction to its
778 GlobalValue::LinkageTypes Linkage = GlobalV->getLinkage();
796 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
800 PPC_MC::verifyInstructionPredicates(MI->getOpcode(),
804 const bool IsPPC64 = Subtarget->isPPC64();
805 const bool IsAIX = Subtarget->isAIXABI();
806 const bool HasAIXSmallLocalTLS = Subtarget->hasAIXSmallLocalExecTLS() ||
807 Subtarget->hasAIXSmallLocalDynamicTLS();
808 const Module *M = MF->getFunction().getParent();
809 PICLevel::Level PL = M->getPICLevel();
813 if (!MI->isInlineAsm()) {
814 for (const MachineOperand &MO: MI->operands()) {
817 if (Subtarget->hasSPE()) {
828 llvm_unreachable("SPE register found in FPU-targeted code!");
837 // Apply an offset to the TOC-based expression such that the adjusted
838 // notional offset from the TOC base (to be encoded into the instruction's D
839 // or DS field) is the signed 16-bit truncation of the original notional
840 // offset from the TOC base.
842 // by AIX ld -r.
844 OriginalOffset - llvm::SignExtend32<16>(OriginalOffset);
846 Expr, MCConstantExpr::create(-Adjustment, OutContext), OutContext);
853 MCSymbolRefExpr::VariantKind::VK_None) -> const MCExpr * {
859 (TOCEntryIter - TOC.begin()) * EntryByteSize;
868 // For TLS initial-exec and local-exec accesses on AIX, we have one TOC
869 // entry for the symbol (with the variable offset), which is differentiated
881 // On AIX, TLS model opt may have turned local-dynamic accesses into
882 // initial-exec accesses.
883 PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
885 FuncInfo->isAIXFuncUseTLSIEForLD()) {
890 llvm_unreachable("Only expecting local-exec or initial-exec accesses!");
893 // the variable offset and the other for the region handle). They are
899 // For local-dynamic TLS access on AIX, we have one TOC entry for the symbol
900 // (the variable offset) and one shared TOC entry for the module handle.
909 // Lower multi-instruction pseudo operations.
910 switch (MI->getOpcode()) {
913 assert(!Subtarget->isAIXABI() &&
917 if (MAI->isLittleEndian())
919 const Function &F = MF->getFunction();
921 (void)F.getFnAttribute("patchable-function-entry")
938 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
939 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
962 MCSymbol *PICBase = MF->getPICBaseSymbol();
972 OutStreamer->emitLabel(PICBase);
977 // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
980 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
981 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
982 // Get the offset from the GOT Base Register to the GOT
984 if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
987 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
990 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);
1007 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(*MF);
1012 MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
1018 // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
1040 const MachineOperand &MO = MI->getOperand(1);
1070 // relative to the toc-base.
1074 "This pseudo should only be selected for 32-bit small code model.");
1080 OutStreamer->getCommentOS() << MO << '\n';
1086 // '.LTOC' to manifest the toc-relative offset.
1105 const MachineOperand &MO = MI->getOperand(2);
1128 const MachineOperand &MO = MI->getOperand(1);
1151 OutStreamer->getCommentOS() << MO << '\n';
1156 const MachineOperand &MO = MI->getOperand(2);
1162 "This pseudo should only be selected for 32-bit large code model on"
1179 // If the symbol does not have the toc-data attribute, then we create the
1180 // TOC entry on AIX. If the toc-data attribute is used, the TOC entry
1189 return GV->hasAttribute("toc-data");
1201 const MachineOperand &MO = MI->getOperand(1);
1207 "This pseudo should only be selected for 32-bit large code model on"
1244 const MachineOperand &MO = MI->getOperand(2);
1253 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());
1287 const MachineOperand &MO = MI->getOperand(1);
1293 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1317 unsigned Op = MI->getOpcode();
1319 // Change the opcode to load address for toc-data.
1320 // ADDItocL is only used for 32-bit toc-data on AIX and will always use LA.
1324 const MachineOperand &MO = MI->getOperand(2);
1328 assert(!(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
1346 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1347 const MachineOperand &MO = MI->getOperand(2);
1354 .addReg(MI->getOperand(0).getReg())
1355 .addReg(MI->getOperand(1).getReg())
1366 const MachineOperand &MO = MI->getOperand(1);
1391 OutStreamer->emitLabel(GOTRef);
1392 OutStreamer->emitValue(OffsExpr, 4);
1393 OutStreamer->emitLabel(NextInstr);
1395 .addReg(MI->getOperand(0).getReg()));
1397 .addReg(MI->getOperand(1).getReg())
1399 .addReg(MI->getOperand(0).getReg()));
1401 .addReg(MI->getOperand(0).getReg())
1402 .addReg(MI->getOperand(1).getReg())
1403 .addReg(MI->getOperand(0).getReg()));
1414 .addReg(MI->getOperand(0).getReg())
1417 .addReg(MI->getOperand(0).getReg())
1418 .addReg(MI->getOperand(0).getReg())
1425 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1426 const MachineOperand &MO = MI->getOperand(2);
1433 .addReg(MI->getOperand(0).getReg())
1434 .addReg(MI->getOperand(1).getReg())
1444 const MachineOperand &MO = MI->getOperand(2);
1453 .addReg(MI->getOperand(0).getReg())
1454 .addReg(MI->getOperand(1).getReg())
1487 assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1488 const MachineOperand &MO = MI->getOperand(2);
1495 .addReg(MI->getOperand(0).getReg())
1496 .addReg(MI->getOperand(1).getReg())
1506 const MachineOperand &MO = MI->getOperand(2);
1515 .addReg(MI->getOperand(0).getReg())
1516 .addReg(MI->getOperand(1).getReg())
1536 const MachineOperand &MO = MI->getOperand(2);
1545 .addReg(MI->getOperand(0).getReg())
1546 .addReg(MI->getOperand(1).getReg())
1553 const MachineOperand &MO = MI->getOperand(2);
1559 .addReg(MI->getOperand(0).getReg())
1560 .addReg(MI->getOperand(1).getReg())
1571 const MachineOperand &MO = MI->getOperand(2);
1579 .addReg(MI->getOperand(0).getReg())
1580 .addReg(MI->getOperand(1).getReg())
1586 if (!Subtarget->hasMFOCRF()) {
1590 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1591 OutStreamer->AddComment(PPCInstPrinter::
1592 getRegisterName(MI->getOperand(1).getReg()));
1594 .addReg(MI->getOperand(0).getReg()));
1600 if (!Subtarget->hasMFOCRF()) {
1604 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1606 ->getEncodingValue(MI->getOperand(0).getReg());
1607 OutStreamer->AddComment(PPCInstPrinter::
1608 getRegisterName(MI->getOperand(0).getReg()));
1611 .addReg(MI->getOperand(1).getReg()));
1621 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1622 // For non-TOC-based local-exec TLS accesses with non-zero offsets, the
1625 for (const MachineOperand &TempMO : MI->operands()) {
1631 const MachineOperand &MO = MI->getOperand(OpNum);
1633 const DataLayout &DL = MO.getGlobal()->getDataLayout();
1634 if (MO.getGlobal()->getPointerAlignment(DL) < 4)
1635 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1639 // non-TOC-based local-exec sequence or to process the instruction normally.
1661 // A faster non-TOC-based local-[exec|dynamic] sequence is represented by
1667 bool IsMIADDI8 = MI->getOpcode() == PPC::ADDI8;
1669 const MachineOperand &MO = MI->getOperand(OpNum);
1706 // For non-TOC-based local-[exec|dynamic] variables that have a non-zero offset,
1707 // we need to create a new MCExpr that adds the non-zero offset to the address
1708 // of the local-[exec|dynamic] variable that will be used in either an addi,
1710 // between [-32768, 32768), so if the TLS address + its non-zero offset is
1714 int64_t Offset) {
1715 // Non-zero offsets (for loads, stores or `addi`) require additional handling.
1716 // When the offset is zero, there is no need to create an adjusted MCExpr.
1717 if (!Offset)
1724 "Only local-[exec|dynamic] accesses are handled!");
1726 bool IsGlobalADeclaration = GValue->isDeclarationForLinker();
1728 // in the TLS variable-to-address mapping. All TLS variables should exist
1734 "variable-to-address map!");
1737 IsGlobalADeclaration ? 0 : TLSVarsMapEntryIter->second;
1738 ptrdiff_t FinalAddress = (TLSVarAddress + Offset);
1739 // If the address of the TLS variable + the offset is less than 32KB,
1741 // non-zero offset to the TLS variable address.
1750 Expr, MCConstantExpr::create(Offset, OutContext), OutContext);
1752 // Handle the written offset for cases where:
1753 // TLS variable address + Offset > 32KB.
1756 // TLSVar@le + Offset - Delta
1759 // Check that the total instruction displacement fits within [-32768,32768).
1760 [[maybe_unused]] ptrdiff_t InstDisp = TLSVarAddress + Offset - Delta;
1762 ((InstDisp < 32768) && (InstDisp >= -32768)) &&
1763 "Expecting the instruction displacement for local-[exec|dynamic] TLS "
1764 "variables to be between [-32768, 32768)!");
1766 Expr, MCConstantExpr::create(-Delta, OutContext), OutContext);
1774 Metadata *MD = M.getModuleFlag("float-abi");
1778 StringRef flt = FloatABI->getString();
1779 // TODO: Support emitting soft-fp and hard double/single attributes.
1781 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1785 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1789 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,
1795 if (!Subtarget->isPPC64())
1798 switch (MI->getOpcode()) {
1805 // std 0, -8(1)
1811 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1814 if (!MAI->isLittleEndian())
1818 OutStreamer->emitLabel(BeginOfSled);
1825 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1833 OutStreamer->emitLabel(EndOfSled);
1838 unsigned RetOpcode = MI->getOperand(0).getImm();
1841 for (const auto &MO : llvm::drop_begin(MI->operands())) {
1871 // std 0, -8(1)
1878 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1885 static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1886 .addReg(MI->getOperand(2).getReg())
1895 // std 0, -8(1)
1901 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1903 OutStreamer->emitCodeAlignment(Align(8), &getSubtargetInfo());
1905 OutStreamer->emitLabel(BeginOfSled);
1910 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1920 OutStreamer->emitLabel(FallthroughLabel);
1938 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1939 TS->emitAbiVersion(2);
1949 OutStreamer->switchSection(OutContext.getELFSection(
1955 OutStreamer->emitLabel(CurrentPos);
1964 OutStreamer->emitAssignment(TOCSym, tocExpr);
1966 OutStreamer->switchSection(getObjFileLowering().getTextSection());
1970 // linux/ppc32 - Normal entry label.
1971 if (!Subtarget->isPPC64() &&
1973 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1976 if (!Subtarget->isPPC64()) {
1977 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1978 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1979 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF);
1980 MCSymbol *PICBase = MF->getPICBaseSymbol();
1981 OutStreamer->emitLabel(RelocSymbol);
1989 OutStreamer->emitValue(OffsExpr, 4);
1990 OutStreamer->emitLabel(CurrentFnSym);
1996 // ELFv2 ABI - Normal entry label.
1997 if (Subtarget->isELFv2ABI()) {
2000 // full 8-byte offset to the TOC in memory immediately preceding
2003 && !MF->getRegInfo().use_empty(PPC::X2)) {
2004 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2007 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF);
2014 OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF));
2015 OutStreamer->emitValue(TOCDeltaExpr, 8);
2021 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2022 MCSectionELF *Section = OutStreamer->getContext().getELFSection(
2024 OutStreamer->switchSection(Section);
2025 OutStreamer->emitLabel(CurrentFnSym);
2026 OutStreamer->emitValueToAlignment(Align(8));
2030 OutStreamer->emitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
2034 OutStreamer->emitValue(
2038 OutStreamer->emitIntValue(0, 8 /* size */);
2039 OutStreamer->switchSection(Current.first, Current.second);
2048 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2055 OutStreamer->emitSymbolValue(
2057 MAI->getCodePointerSize());
2064 OutStreamer->switchSection(Section);
2066 OutStreamer->emitValueToAlignment(Align(4));
2072 OutStreamer->emitLabel(TOCEntryLabel);
2074 TS->emitTCEntry(*TOCEntryTarget, TOCMapPair.first.second);
2076 OutStreamer->emitSymbolValue(TOCEntryTarget, 4);
2083 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
2095 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
2096 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
2098 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2104 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
2108 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
2111 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
2116 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
2117 const bool UsesX2OrR2 = !MF->getRegInfo().use_empty(PPC::X2) ||
2118 !MF->getRegInfo().use_empty(PPC::R2);
2119 const bool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() &&
2120 UsesX2OrR2 && PPCFI->usesTOCBasePtr();
2121 const bool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() &&
2122 Subtarget->isELFv2ABI() && UsesX2OrR2;
2129 // branch-selection pass which sets the offset of the first block in the
2131 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF);
2132 OutStreamer->emitLabel(GlobalEntryLabel);
2154 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF);
2169 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF);
2170 OutStreamer->emitLabel(LocalEntryLabel);
2178 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2179 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
2180 } else if (Subtarget->isUsingPCRelativeCalls()) {
2184 // 1) A leaf function that does not use R2 (or treats it as callee-saved
2202 if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() ||
2203 MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) {
2205 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2206 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym),
2212 /// EmitFunctionBodyEnd - Print the traceback table before the .size
2216 // Only the 64-bit target requires a traceback table. For now,
2218 // the end of the function, and zeroes for the eight-byte
2220 // FIXME: We should fill in the eight-byte mandatory fields as described in
2221 // the PPC64 ELF ABI (this is a low-priority item because GDB does not
2223 if (Subtarget->isPPC64()) {
2224 OutStreamer->emitIntValue(0, 4/*size*/);
2225 OutStreamer->emitIntValue(0, 8/*size*/);
2232 assert(MAI->hasVisibilityOnlyWithLinkage() &&
2236 switch (GV->getLinkage()) {
2238 LinkageAttr = GV->isDeclaration() ? MCSA_Extern : MCSA_Global;
2253 assert(GV->getVisibility() == GlobalValue::DefaultVisibility &&
2267 if (GV->hasDLLExportStorageClass() && !GV->hasDefaultVisibility())
2269 "Cannot not be both dllexport and non-default visibility");
2270 switch (GV->getVisibility()) {
2274 if (GV->hasDLLExportStorageClass())
2275 VisibilityAttr = MAI->getExportedVisibilityAttr();
2278 VisibilityAttr = MAI->getHiddenVisibilityAttr();
2281 VisibilityAttr = MAI->getProtectedVisibilityAttr();
2287 if (GV->getThreadLocalMode() == GlobalVariable::LocalDynamicTLSModel &&
2288 GV->hasName() && GV->getName() == "_$TLSML")
2291 OutStreamer->emitXCOFFSymbolLinkageWithVisibility(GVSym, LinkageAttr,
2300 FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4));
2302 CurrentFnDescSym = FnDescSec->getQualNameSymbol();
2311 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
2314 const MachineRegisterInfo &MRI = MF->getRegInfo();
2318 return PPC::V31 - Reg + 1;
2338 OutStreamer->switchSection(getObjFileLowering().getCompactUnwindSection());
2341 OutStreamer->emitLabel(EHInfoLabel);
2344 OutStreamer->emitInt32(0);
2346 const DataLayout &DL = MMI->getModule()->getDataLayout();
2349 OutStreamer->emitValueToAlignment(Align(PointerSize));
2351 OutStreamer->emitIntValue(0, PointerSize);
2352 OutStreamer->emitIntValue(0, PointerSize);
2353 OutStreamer->switchSection(MF->getSection());
2360 MCSymbol *FuncEnd = createTempSymbol(MF->getName());
2361 OutStreamer->emitLabel(FuncEnd);
2363 OutStreamer->AddComment("Traceback table begin");
2365 OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/);
2371 OutStreamer->AddComment(CommentOS.str());
2377 OutStreamer->emitIntValueInHexWithPadding(Value, Size);
2401 // We always set traceback offset bit to true.
2404 const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();
2405 const MachineRegisterInfo &MRI = MF->getRegInfo();
2407 // Check the function uses floating-point processor instructions or not
2416 CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \
2442 OutStreamer->emitIntValueInHexWithPadding(
2449 static_cast<const PPCRegisterInfo *>(Subtarget->getRegisterInfo());
2450 Register FrameReg = RegInfo->getFrameRegister(*MF);
2451 if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
2454 const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
2458 if (FI->mustSaveLR())
2470 OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff),
2476 SecondHalfOfMandatoryField |= MF->getFrameInfo().getStackSize()
2483 FPRSaved = PPC::F31 - Reg + 1;
2493 OutStreamer->emitIntValueInHexWithPadding(
2508 if (FI->hasVectorParms() || HasVectorInst)
2520 // X13 is reserved under 64-bit environment.
2521 unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
2522 unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
2526 GPRSaved = GPREnd - Reg + 1;
2538 OutStreamer->emitIntValueInHexWithPadding(
2542 uint32_t NumberOfFixedParms = FI->getFixedParmsNum();
2549 OutStreamer->emitIntValueInHexWithPadding(
2557 uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum();
2566 OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff,
2573 uint32_t ParmsTypeValue = FI->getParmsType();
2576 FI->hasVectorParms()
2579 FI->getVectorParmsNum())
2588 OutStreamer->emitIntValueInHexWithPadding(ParmsTypeValue,
2591 // Traceback table offset.
2592 OutStreamer->AddComment("Function size");
2595 &(MF->getFunction()), TM);
2596 OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4);
2607 StringRef Name = MF->getName().substr(0, INT16_MAX);
2612 OutStreamer->AddComment("Function Name");
2613 OutStreamer->emitBytes(Name);
2618 OutStreamer->AddComment("AllocaUsed");
2619 OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg));
2637 if (FI->getVarArgsFrameIndex())
2641 unsigned VectorParmsNum = FI->getVectorParmsNum();
2652 OutStreamer->emitIntValueInHexWithPadding((VRData & 0xff00) >> 8, 1);
2657 OutStreamer->emitIntValueInHexWithPadding(VRData & 0x00ff, 1);
2659 uint32_t VecParmTypeValue = FI->getVecExtParmsType();
2668 OutStreamer->emitIntValueInHexWithPadding(VecParmTypeValue,
2689 auto &Ctx = OutStreamer->getContext();
2695 ->getQualNameSymbol();
2701 OutStreamer->emitValueToAlignment(Align(4));
2702 OutStreamer->AddComment("EHInfo Table");
2703 OutStreamer->emitValue(Exp, DL.getPointerSize());
2710 return GV->hasAppendingLinkage() &&
2711 StringSwitch<bool>(GV->getName())
2714 // AIX OS team come up with a good solution.
2722 return StringSwitch<bool>(GV->getName())
2729 return getAliasOffset(GA->getAliasee());
2735 if (CBE->getOpcode() != MCBinaryExpr::Add)
2736 report_fatal_error("Only adding an offset is supported now.");
2737 auto *RHS = dyn_cast<MCConstantExpr>(CBE->getRHS());
2739 report_fatal_error("Unable to get the offset of alias.");
2740 return RHS->getValue();
2749 PointerSize >= GV->getAlign().valueOrOne().value() &&
2753 Type *GVType = GV->getValueType();
2754 assert(GVType->isSized() && "A GlobalVariable's size must be known to be "
2756 if (GV->getDataLayout().getTypeSizeInBits(GVType) >
2761 if (GV->hasPrivateLinkage())
2771 // If the Global Variable has the toc-data attribute, it needs to be emitted
2773 if (GV->hasAttribute("toc-data")) {
2774 unsigned PointerSize = GV->getDataLayout().getPointerSize();
2784 assert(!GV->getName().starts_with("llvm.") &&
2787 if (GV->hasComdat())
2792 if (GV->isDeclarationForLinker()) {
2805 if (GV->hasInitializer()) {
2806 GV->printAsOperand(OutStreamer->getCommentOS(),
2807 /*PrintType=*/false, GV->getParent());
2808 OutStreamer->getCommentOS() << '\n';
2816 OutStreamer->switchSection(Csect);
2818 const DataLayout &DL = GV->getDataLayout();
2820 // Handle common and zero-initialized local symbols.
2821 if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||
2823 Align Alignment = GV->getAlign().value_or(DL.getPreferredAlign(GV));
2824 uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
2825 GVSym->setStorageClass(
2828 if (GVKind.isBSSLocal() && Csect->getMappingClass() == XCOFF::XMC_TD) {
2829 OutStreamer->emitZeros(Size);
2831 assert(Csect->getMappingClass() != XCOFF::XMC_TD &&
2832 "BSS local toc-data already handled and TLS variables "
2834 OutStreamer->emitXCOFFLocalCommonSymbol(
2835 OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()), Size,
2838 OutStreamer->emitCommonSymbol(GVSym, Size, Alignment);
2852 // When -fdata-sections is enabled, every GlobalVariable will
2854 if (!TM.getDataSections() || GV->hasSection()) {
2855 if (Csect->getMappingClass() != XCOFF::XMC_TD)
2856 OutStreamer->emitLabel(EmittedInitSym);
2861 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());
2865 // Aliases with the same offset should be aligned. Record the list of aliases
2866 // associated with the offset.
2869 AliasList[getAliasOffset(GA->getAliasee())].push_back(GA);
2872 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer(),
2880 MCSectionSubPair Current = OutStreamer->getCurrentSection();
2882 OutStreamer->switchSection(
2883 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getRepresentedCsect());
2886 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()])
2887 OutStreamer->emitLabel(getSymbol(Alias));
2890 OutStreamer->emitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext),
2895 ->getQualNameSymbol();
2896 OutStreamer->emitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext),
2899 OutStreamer->emitIntValue(0, PointerSize);
2901 OutStreamer->switchSection(Current.first, Current.second);
2907 if (!TM.getFunctionSections() || MF->getFunction().hasSection())
2911 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()])
2912 OutStreamer->emitLabel(
2925 // same address (because one or more of them are zero-length), the referring
2943 OutStreamer->switchSection(CntsSection);
2948 OutStreamer->emitXCOFFRefDirective(S);
2954 OutStreamer->emitXCOFFRefDirective(S);
2960 OutStreamer->emitXCOFFRefDirective(S);
2966 // If there are no functions and there are no toc-data definitions in this
2974 OutStreamer->switchSection(getObjFileLowering().getTOCBaseSection());
2977 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
2987 (Subtarget->hasAIXShLibTLSModelOpt() &&
2992 Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();
3000 OutStreamer->switchSection(TCEntry);
3002 OutStreamer->emitLabel(I.second);
3003 TS->emitTCEntry(*I.first.first, I.first.second);
3007 // non-common global variables before the common ones, as emitting a
3010 if (!GV->hasCommonLinkage())
3014 if (GV->hasCommonLinkage())
3024 if (GO->isDeclarationForLinker())
3031 Align GOAlign = getGVAlignment(GO, GO->getDataLayout());
3032 Csect->ensureMinAlignment(GOAlign);
3037 // or not local-exec TLS variables require special assembly printing.
3100 if (Aliasee->hasCommonLinkage()) {
3104 " is invalid because " + Aliasee->getName() +
3112 std::optional<CodeModel::Model> OptionalCodeModel = GVar->getCodeModel();
3125 switch (MI->getOpcode()) {
3132 if (MI->getNumOperands() < 5)
3134 const MachineOperand &LangMO = MI->getOperand(3);
3135 const MachineOperand &ReasonMO = MI->getOperand(4);
3139 OutStreamer->emitLabel(TempSym);
3140 OutStreamer->emitXCOFFExceptDirective(CurrentFnSym, TempSym,
3142 Subtarget->isPPC64() ? MI->getMF()->getInstructionCount() * 8 :
3143 MI->getMF()->getInstructionCount() * 4,
3144 MMI->hasDebugInfo());
3155 createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode());
3163 const MachineOperand &MO = MI->getOperand(0);
3181 if (MI->getOperand(0).isSymbol())
3202 if (!MAI->usesDwarfFileAndLocDirectives() && MMI->hasDebugInfo())
3203 OutStreamer->doFinalizationAtSectionEnd(
3204 OutStreamer->getContext().getObjectFileInfo()->getTextSection());
3207 OutStreamer->emitSymbolAttribute(Sym, MCSA_Extern);
3219 return 20 + (P - 20) * 16;
3222 return 1004 + (P - 81);
3225 return 2047 + (P - 1124) * 33878;
3227 return 2147482625u + (P - 64512);
3237 // - directly mapping the first 21 and the last 20 elements of the ranges
3238 // - linear interpolating the intermediate values with a step size of 16.
3242 // - directly mapping the first and the last 1024 elements of the ranges
3243 // - linear interpolating the intermediate values with a step size of 33878.
3247 llvm::raw_string_ostream os(PrioritySuffix);
3248 os << llvm::format_hex_no_prefix(P, 8);
3249 os.flush();
3263 S.Func = CE->getOperand(0);
3279 GlobalValue::LinkageTypes Linkage = GV->getLinkage();
3288 ->getQualNameSymbol();
3289 auto &Ctx = OutStreamer->getContext();
3293 OutStreamer->emitValue(Exp, GetSizeOfEncodedValue(Encoding));
3295 OutStreamer->emitIntValue(0, GetSizeOfEncodedValue(Encoding));
3311 if (!NMD || !NMD->getNumOperands())
3316 for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) {
3317 const MDNode *N = NMD->getOperand(i);
3318 assert(N->getNumOperands() == 1 &&
3320 const MDString *MDS = cast<MDString>(N->getOperand(0));
3323 RSOS << "@(#)opt " << MDS->getString() << "\n";
3326 OutStreamer->emitXCOFFCInfoSym(".GCC.command.line", RSOS.str());