Lines Matching full:case
78 case NVPTX::SULD_1D_I8_CLAMP_R: in suldRegisterToIndexOpcode()
80 case NVPTX::SULD_1D_I16_CLAMP_R: in suldRegisterToIndexOpcode()
82 case NVPTX::SULD_1D_I32_CLAMP_R: in suldRegisterToIndexOpcode()
84 case NVPTX::SULD_1D_I64_CLAMP_R: in suldRegisterToIndexOpcode()
86 case NVPTX::SULD_1D_ARRAY_I8_CLAMP_R: in suldRegisterToIndexOpcode()
88 case NVPTX::SULD_1D_ARRAY_I16_CLAMP_R: in suldRegisterToIndexOpcode()
90 case NVPTX::SULD_1D_ARRAY_I32_CLAMP_R: in suldRegisterToIndexOpcode()
92 case NVPTX::SULD_1D_ARRAY_I64_CLAMP_R: in suldRegisterToIndexOpcode()
94 case NVPTX::SULD_2D_I8_CLAMP_R: in suldRegisterToIndexOpcode()
96 case NVPTX::SULD_2D_I16_CLAMP_R: in suldRegisterToIndexOpcode()
98 case NVPTX::SULD_2D_I32_CLAMP_R: in suldRegisterToIndexOpcode()
100 case NVPTX::SULD_2D_I64_CLAMP_R: in suldRegisterToIndexOpcode()
102 case NVPTX::SULD_2D_ARRAY_I8_CLAMP_R: in suldRegisterToIndexOpcode()
104 case NVPTX::SULD_2D_ARRAY_I16_CLAMP_R: in suldRegisterToIndexOpcode()
106 case NVPTX::SULD_2D_ARRAY_I32_CLAMP_R: in suldRegisterToIndexOpcode()
108 case NVPTX::SULD_2D_ARRAY_I64_CLAMP_R: in suldRegisterToIndexOpcode()
110 case NVPTX::SULD_3D_I8_CLAMP_R: in suldRegisterToIndexOpcode()
112 case NVPTX::SULD_3D_I16_CLAMP_R: in suldRegisterToIndexOpcode()
114 case NVPTX::SULD_3D_I32_CLAMP_R: in suldRegisterToIndexOpcode()
116 case NVPTX::SULD_3D_I64_CLAMP_R: in suldRegisterToIndexOpcode()
118 case NVPTX::SULD_1D_V2I8_CLAMP_R: in suldRegisterToIndexOpcode()
120 case NVPTX::SULD_1D_V2I16_CLAMP_R: in suldRegisterToIndexOpcode()
122 case NVPTX::SULD_1D_V2I32_CLAMP_R: in suldRegisterToIndexOpcode()
124 case NVPTX::SULD_1D_V2I64_CLAMP_R: in suldRegisterToIndexOpcode()
126 case NVPTX::SULD_1D_ARRAY_V2I8_CLAMP_R: in suldRegisterToIndexOpcode()
128 case NVPTX::SULD_1D_ARRAY_V2I16_CLAMP_R: in suldRegisterToIndexOpcode()
130 case NVPTX::SULD_1D_ARRAY_V2I32_CLAMP_R: in suldRegisterToIndexOpcode()
132 case NVPTX::SULD_1D_ARRAY_V2I64_CLAMP_R: in suldRegisterToIndexOpcode()
134 case NVPTX::SULD_2D_V2I8_CLAMP_R: in suldRegisterToIndexOpcode()
136 case NVPTX::SULD_2D_V2I16_CLAMP_R: in suldRegisterToIndexOpcode()
138 case NVPTX::SULD_2D_V2I32_CLAMP_R: in suldRegisterToIndexOpcode()
140 case NVPTX::SULD_2D_V2I64_CLAMP_R: in suldRegisterToIndexOpcode()
142 case NVPTX::SULD_2D_ARRAY_V2I8_CLAMP_R: in suldRegisterToIndexOpcode()
144 case NVPTX::SULD_2D_ARRAY_V2I16_CLAMP_R: in suldRegisterToIndexOpcode()
146 case NVPTX::SULD_2D_ARRAY_V2I32_CLAMP_R: in suldRegisterToIndexOpcode()
148 case NVPTX::SULD_2D_ARRAY_V2I64_CLAMP_R: in suldRegisterToIndexOpcode()
150 case NVPTX::SULD_3D_V2I8_CLAMP_R: in suldRegisterToIndexOpcode()
152 case NVPTX::SULD_3D_V2I16_CLAMP_R: in suldRegisterToIndexOpcode()
154 case NVPTX::SULD_3D_V2I32_CLAMP_R: in suldRegisterToIndexOpcode()
156 case NVPTX::SULD_3D_V2I64_CLAMP_R: in suldRegisterToIndexOpcode()
158 case NVPTX::SULD_1D_V4I8_CLAMP_R: in suldRegisterToIndexOpcode()
160 case NVPTX::SULD_1D_V4I16_CLAMP_R: in suldRegisterToIndexOpcode()
162 case NVPTX::SULD_1D_V4I32_CLAMP_R: in suldRegisterToIndexOpcode()
164 case NVPTX::SULD_1D_ARRAY_V4I8_CLAMP_R: in suldRegisterToIndexOpcode()
166 case NVPTX::SULD_1D_ARRAY_V4I16_CLAMP_R: in suldRegisterToIndexOpcode()
168 case NVPTX::SULD_1D_ARRAY_V4I32_CLAMP_R: in suldRegisterToIndexOpcode()
170 case NVPTX::SULD_2D_V4I8_CLAMP_R: in suldRegisterToIndexOpcode()
172 case NVPTX::SULD_2D_V4I16_CLAMP_R: in suldRegisterToIndexOpcode()
174 case NVPTX::SULD_2D_V4I32_CLAMP_R: in suldRegisterToIndexOpcode()
176 case NVPTX::SULD_2D_ARRAY_V4I8_CLAMP_R: in suldRegisterToIndexOpcode()
178 case NVPTX::SULD_2D_ARRAY_V4I16_CLAMP_R: in suldRegisterToIndexOpcode()
180 case NVPTX::SULD_2D_ARRAY_V4I32_CLAMP_R: in suldRegisterToIndexOpcode()
182 case NVPTX::SULD_3D_V4I8_CLAMP_R: in suldRegisterToIndexOpcode()
184 case NVPTX::SULD_3D_V4I16_CLAMP_R: in suldRegisterToIndexOpcode()
186 case NVPTX::SULD_3D_V4I32_CLAMP_R: in suldRegisterToIndexOpcode()
188 case NVPTX::SULD_1D_I8_TRAP_R: in suldRegisterToIndexOpcode()
190 case NVPTX::SULD_1D_I16_TRAP_R: in suldRegisterToIndexOpcode()
192 case NVPTX::SULD_1D_I32_TRAP_R: in suldRegisterToIndexOpcode()
194 case NVPTX::SULD_1D_I64_TRAP_R: in suldRegisterToIndexOpcode()
196 case NVPTX::SULD_1D_ARRAY_I8_TRAP_R: in suldRegisterToIndexOpcode()
198 case NVPTX::SULD_1D_ARRAY_I16_TRAP_R: in suldRegisterToIndexOpcode()
200 case NVPTX::SULD_1D_ARRAY_I32_TRAP_R: in suldRegisterToIndexOpcode()
202 case NVPTX::SULD_1D_ARRAY_I64_TRAP_R: in suldRegisterToIndexOpcode()
204 case NVPTX::SULD_2D_I8_TRAP_R: in suldRegisterToIndexOpcode()
206 case NVPTX::SULD_2D_I16_TRAP_R: in suldRegisterToIndexOpcode()
208 case NVPTX::SULD_2D_I32_TRAP_R: in suldRegisterToIndexOpcode()
210 case NVPTX::SULD_2D_I64_TRAP_R: in suldRegisterToIndexOpcode()
212 case NVPTX::SULD_2D_ARRAY_I8_TRAP_R: in suldRegisterToIndexOpcode()
214 case NVPTX::SULD_2D_ARRAY_I16_TRAP_R: in suldRegisterToIndexOpcode()
216 case NVPTX::SULD_2D_ARRAY_I32_TRAP_R: in suldRegisterToIndexOpcode()
218 case NVPTX::SULD_2D_ARRAY_I64_TRAP_R: in suldRegisterToIndexOpcode()
220 case NVPTX::SULD_3D_I8_TRAP_R: in suldRegisterToIndexOpcode()
222 case NVPTX::SULD_3D_I16_TRAP_R: in suldRegisterToIndexOpcode()
224 case NVPTX::SULD_3D_I32_TRAP_R: in suldRegisterToIndexOpcode()
226 case NVPTX::SULD_3D_I64_TRAP_R: in suldRegisterToIndexOpcode()
228 case NVPTX::SULD_1D_V2I8_TRAP_R: in suldRegisterToIndexOpcode()
230 case NVPTX::SULD_1D_V2I16_TRAP_R: in suldRegisterToIndexOpcode()
232 case NVPTX::SULD_1D_V2I32_TRAP_R: in suldRegisterToIndexOpcode()
234 case NVPTX::SULD_1D_V2I64_TRAP_R: in suldRegisterToIndexOpcode()
236 case NVPTX::SULD_1D_ARRAY_V2I8_TRAP_R: in suldRegisterToIndexOpcode()
238 case NVPTX::SULD_1D_ARRAY_V2I16_TRAP_R: in suldRegisterToIndexOpcode()
240 case NVPTX::SULD_1D_ARRAY_V2I32_TRAP_R: in suldRegisterToIndexOpcode()
242 case NVPTX::SULD_1D_ARRAY_V2I64_TRAP_R: in suldRegisterToIndexOpcode()
244 case NVPTX::SULD_2D_V2I8_TRAP_R: in suldRegisterToIndexOpcode()
246 case NVPTX::SULD_2D_V2I16_TRAP_R: in suldRegisterToIndexOpcode()
248 case NVPTX::SULD_2D_V2I32_TRAP_R: in suldRegisterToIndexOpcode()
250 case NVPTX::SULD_2D_V2I64_TRAP_R: in suldRegisterToIndexOpcode()
252 case NVPTX::SULD_2D_ARRAY_V2I8_TRAP_R: in suldRegisterToIndexOpcode()
254 case NVPTX::SULD_2D_ARRAY_V2I16_TRAP_R: in suldRegisterToIndexOpcode()
256 case NVPTX::SULD_2D_ARRAY_V2I32_TRAP_R: in suldRegisterToIndexOpcode()
258 case NVPTX::SULD_2D_ARRAY_V2I64_TRAP_R: in suldRegisterToIndexOpcode()
260 case NVPTX::SULD_3D_V2I8_TRAP_R: in suldRegisterToIndexOpcode()
262 case NVPTX::SULD_3D_V2I16_TRAP_R: in suldRegisterToIndexOpcode()
264 case NVPTX::SULD_3D_V2I32_TRAP_R: in suldRegisterToIndexOpcode()
266 case NVPTX::SULD_3D_V2I64_TRAP_R: in suldRegisterToIndexOpcode()
268 case NVPTX::SULD_1D_V4I8_TRAP_R: in suldRegisterToIndexOpcode()
270 case NVPTX::SULD_1D_V4I16_TRAP_R: in suldRegisterToIndexOpcode()
272 case NVPTX::SULD_1D_V4I32_TRAP_R: in suldRegisterToIndexOpcode()
274 case NVPTX::SULD_1D_ARRAY_V4I8_TRAP_R: in suldRegisterToIndexOpcode()
276 case NVPTX::SULD_1D_ARRAY_V4I16_TRAP_R: in suldRegisterToIndexOpcode()
278 case NVPTX::SULD_1D_ARRAY_V4I32_TRAP_R: in suldRegisterToIndexOpcode()
280 case NVPTX::SULD_2D_V4I8_TRAP_R: in suldRegisterToIndexOpcode()
282 case NVPTX::SULD_2D_V4I16_TRAP_R: in suldRegisterToIndexOpcode()
284 case NVPTX::SULD_2D_V4I32_TRAP_R: in suldRegisterToIndexOpcode()
286 case NVPTX::SULD_2D_ARRAY_V4I8_TRAP_R: in suldRegisterToIndexOpcode()
288 case NVPTX::SULD_2D_ARRAY_V4I16_TRAP_R: in suldRegisterToIndexOpcode()
290 case NVPTX::SULD_2D_ARRAY_V4I32_TRAP_R: in suldRegisterToIndexOpcode()
292 case NVPTX::SULD_3D_V4I8_TRAP_R: in suldRegisterToIndexOpcode()
294 case NVPTX::SULD_3D_V4I16_TRAP_R: in suldRegisterToIndexOpcode()
296 case NVPTX::SULD_3D_V4I32_TRAP_R: in suldRegisterToIndexOpcode()
298 case NVPTX::SULD_1D_I8_ZERO_R: in suldRegisterToIndexOpcode()
300 case NVPTX::SULD_1D_I16_ZERO_R: in suldRegisterToIndexOpcode()
302 case NVPTX::SULD_1D_I32_ZERO_R: in suldRegisterToIndexOpcode()
304 case NVPTX::SULD_1D_I64_ZERO_R: in suldRegisterToIndexOpcode()
306 case NVPTX::SULD_1D_ARRAY_I8_ZERO_R: in suldRegisterToIndexOpcode()
308 case NVPTX::SULD_1D_ARRAY_I16_ZERO_R: in suldRegisterToIndexOpcode()
310 case NVPTX::SULD_1D_ARRAY_I32_ZERO_R: in suldRegisterToIndexOpcode()
312 case NVPTX::SULD_1D_ARRAY_I64_ZERO_R: in suldRegisterToIndexOpcode()
314 case NVPTX::SULD_2D_I8_ZERO_R: in suldRegisterToIndexOpcode()
316 case NVPTX::SULD_2D_I16_ZERO_R: in suldRegisterToIndexOpcode()
318 case NVPTX::SULD_2D_I32_ZERO_R: in suldRegisterToIndexOpcode()
320 case NVPTX::SULD_2D_I64_ZERO_R: in suldRegisterToIndexOpcode()
322 case NVPTX::SULD_2D_ARRAY_I8_ZERO_R: in suldRegisterToIndexOpcode()
324 case NVPTX::SULD_2D_ARRAY_I16_ZERO_R: in suldRegisterToIndexOpcode()
326 case NVPTX::SULD_2D_ARRAY_I32_ZERO_R: in suldRegisterToIndexOpcode()
328 case NVPTX::SULD_2D_ARRAY_I64_ZERO_R: in suldRegisterToIndexOpcode()
330 case NVPTX::SULD_3D_I8_ZERO_R: in suldRegisterToIndexOpcode()
332 case NVPTX::SULD_3D_I16_ZERO_R: in suldRegisterToIndexOpcode()
334 case NVPTX::SULD_3D_I32_ZERO_R: in suldRegisterToIndexOpcode()
336 case NVPTX::SULD_3D_I64_ZERO_R: in suldRegisterToIndexOpcode()
338 case NVPTX::SULD_1D_V2I8_ZERO_R: in suldRegisterToIndexOpcode()
340 case NVPTX::SULD_1D_V2I16_ZERO_R: in suldRegisterToIndexOpcode()
342 case NVPTX::SULD_1D_V2I32_ZERO_R: in suldRegisterToIndexOpcode()
344 case NVPTX::SULD_1D_V2I64_ZERO_R: in suldRegisterToIndexOpcode()
346 case NVPTX::SULD_1D_ARRAY_V2I8_ZERO_R: in suldRegisterToIndexOpcode()
348 case NVPTX::SULD_1D_ARRAY_V2I16_ZERO_R: in suldRegisterToIndexOpcode()
350 case NVPTX::SULD_1D_ARRAY_V2I32_ZERO_R: in suldRegisterToIndexOpcode()
352 case NVPTX::SULD_1D_ARRAY_V2I64_ZERO_R: in suldRegisterToIndexOpcode()
354 case NVPTX::SULD_2D_V2I8_ZERO_R: in suldRegisterToIndexOpcode()
356 case NVPTX::SULD_2D_V2I16_ZERO_R: in suldRegisterToIndexOpcode()
358 case NVPTX::SULD_2D_V2I32_ZERO_R: in suldRegisterToIndexOpcode()
360 case NVPTX::SULD_2D_V2I64_ZERO_R: in suldRegisterToIndexOpcode()
362 case NVPTX::SULD_2D_ARRAY_V2I8_ZERO_R: in suldRegisterToIndexOpcode()
364 case NVPTX::SULD_2D_ARRAY_V2I16_ZERO_R: in suldRegisterToIndexOpcode()
366 case NVPTX::SULD_2D_ARRAY_V2I32_ZERO_R: in suldRegisterToIndexOpcode()
368 case NVPTX::SULD_2D_ARRAY_V2I64_ZERO_R: in suldRegisterToIndexOpcode()
370 case NVPTX::SULD_3D_V2I8_ZERO_R: in suldRegisterToIndexOpcode()
372 case NVPTX::SULD_3D_V2I16_ZERO_R: in suldRegisterToIndexOpcode()
374 case NVPTX::SULD_3D_V2I32_ZERO_R: in suldRegisterToIndexOpcode()
376 case NVPTX::SULD_3D_V2I64_ZERO_R: in suldRegisterToIndexOpcode()
378 case NVPTX::SULD_1D_V4I8_ZERO_R: in suldRegisterToIndexOpcode()
380 case NVPTX::SULD_1D_V4I16_ZERO_R: in suldRegisterToIndexOpcode()
382 case NVPTX::SULD_1D_V4I32_ZERO_R: in suldRegisterToIndexOpcode()
384 case NVPTX::SULD_1D_ARRAY_V4I8_ZERO_R: in suldRegisterToIndexOpcode()
386 case NVPTX::SULD_1D_ARRAY_V4I16_ZERO_R: in suldRegisterToIndexOpcode()
388 case NVPTX::SULD_1D_ARRAY_V4I32_ZERO_R: in suldRegisterToIndexOpcode()
390 case NVPTX::SULD_2D_V4I8_ZERO_R: in suldRegisterToIndexOpcode()
392 case NVPTX::SULD_2D_V4I16_ZERO_R: in suldRegisterToIndexOpcode()
394 case NVPTX::SULD_2D_V4I32_ZERO_R: in suldRegisterToIndexOpcode()
396 case NVPTX::SULD_2D_ARRAY_V4I8_ZERO_R: in suldRegisterToIndexOpcode()
398 case NVPTX::SULD_2D_ARRAY_V4I16_ZERO_R: in suldRegisterToIndexOpcode()
400 case NVPTX::SULD_2D_ARRAY_V4I32_ZERO_R: in suldRegisterToIndexOpcode()
402 case NVPTX::SULD_3D_V4I8_ZERO_R: in suldRegisterToIndexOpcode()
404 case NVPTX::SULD_3D_V4I16_ZERO_R: in suldRegisterToIndexOpcode()
406 case NVPTX::SULD_3D_V4I32_ZERO_R: in suldRegisterToIndexOpcode()
415 case NVPTX::SUST_B_1D_B8_CLAMP_R: in sustRegisterToIndexOpcode()
417 case NVPTX::SUST_B_1D_B16_CLAMP_R: in sustRegisterToIndexOpcode()
419 case NVPTX::SUST_B_1D_B32_CLAMP_R: in sustRegisterToIndexOpcode()
421 case NVPTX::SUST_B_1D_B64_CLAMP_R: in sustRegisterToIndexOpcode()
423 case NVPTX::SUST_B_1D_V2B8_CLAMP_R: in sustRegisterToIndexOpcode()
425 case NVPTX::SUST_B_1D_V2B16_CLAMP_R: in sustRegisterToIndexOpcode()
427 case NVPTX::SUST_B_1D_V2B32_CLAMP_R: in sustRegisterToIndexOpcode()
429 case NVPTX::SUST_B_1D_V2B64_CLAMP_R: in sustRegisterToIndexOpcode()
431 case NVPTX::SUST_B_1D_V4B8_CLAMP_R: in sustRegisterToIndexOpcode()
433 case NVPTX::SUST_B_1D_V4B16_CLAMP_R: in sustRegisterToIndexOpcode()
435 case NVPTX::SUST_B_1D_V4B32_CLAMP_R: in sustRegisterToIndexOpcode()
437 case NVPTX::SUST_B_1D_ARRAY_B8_CLAMP_R: in sustRegisterToIndexOpcode()
439 case NVPTX::SUST_B_1D_ARRAY_B16_CLAMP_R: in sustRegisterToIndexOpcode()
441 case NVPTX::SUST_B_1D_ARRAY_B32_CLAMP_R: in sustRegisterToIndexOpcode()
443 case NVPTX::SUST_B_1D_ARRAY_B64_CLAMP_R: in sustRegisterToIndexOpcode()
445 case NVPTX::SUST_B_1D_ARRAY_V2B8_CLAMP_R: in sustRegisterToIndexOpcode()
447 case NVPTX::SUST_B_1D_ARRAY_V2B16_CLAMP_R: in sustRegisterToIndexOpcode()
449 case NVPTX::SUST_B_1D_ARRAY_V2B32_CLAMP_R: in sustRegisterToIndexOpcode()
451 case NVPTX::SUST_B_1D_ARRAY_V2B64_CLAMP_R: in sustRegisterToIndexOpcode()
453 case NVPTX::SUST_B_1D_ARRAY_V4B8_CLAMP_R: in sustRegisterToIndexOpcode()
455 case NVPTX::SUST_B_1D_ARRAY_V4B16_CLAMP_R: in sustRegisterToIndexOpcode()
457 case NVPTX::SUST_B_1D_ARRAY_V4B32_CLAMP_R: in sustRegisterToIndexOpcode()
459 case NVPTX::SUST_B_2D_B8_CLAMP_R: in sustRegisterToIndexOpcode()
461 case NVPTX::SUST_B_2D_B16_CLAMP_R: in sustRegisterToIndexOpcode()
463 case NVPTX::SUST_B_2D_B32_CLAMP_R: in sustRegisterToIndexOpcode()
465 case NVPTX::SUST_B_2D_B64_CLAMP_R: in sustRegisterToIndexOpcode()
467 case NVPTX::SUST_B_2D_V2B8_CLAMP_R: in sustRegisterToIndexOpcode()
469 case NVPTX::SUST_B_2D_V2B16_CLAMP_R: in sustRegisterToIndexOpcode()
471 case NVPTX::SUST_B_2D_V2B32_CLAMP_R: in sustRegisterToIndexOpcode()
473 case NVPTX::SUST_B_2D_V2B64_CLAMP_R: in sustRegisterToIndexOpcode()
475 case NVPTX::SUST_B_2D_V4B8_CLAMP_R: in sustRegisterToIndexOpcode()
477 case NVPTX::SUST_B_2D_V4B16_CLAMP_R: in sustRegisterToIndexOpcode()
479 case NVPTX::SUST_B_2D_V4B32_CLAMP_R: in sustRegisterToIndexOpcode()
481 case NVPTX::SUST_B_2D_ARRAY_B8_CLAMP_R: in sustRegisterToIndexOpcode()
483 case NVPTX::SUST_B_2D_ARRAY_B16_CLAMP_R: in sustRegisterToIndexOpcode()
485 case NVPTX::SUST_B_2D_ARRAY_B32_CLAMP_R: in sustRegisterToIndexOpcode()
487 case NVPTX::SUST_B_2D_ARRAY_B64_CLAMP_R: in sustRegisterToIndexOpcode()
489 case NVPTX::SUST_B_2D_ARRAY_V2B8_CLAMP_R: in sustRegisterToIndexOpcode()
491 case NVPTX::SUST_B_2D_ARRAY_V2B16_CLAMP_R: in sustRegisterToIndexOpcode()
493 case NVPTX::SUST_B_2D_ARRAY_V2B32_CLAMP_R: in sustRegisterToIndexOpcode()
495 case NVPTX::SUST_B_2D_ARRAY_V2B64_CLAMP_R: in sustRegisterToIndexOpcode()
497 case NVPTX::SUST_B_2D_ARRAY_V4B8_CLAMP_R: in sustRegisterToIndexOpcode()
499 case NVPTX::SUST_B_2D_ARRAY_V4B16_CLAMP_R: in sustRegisterToIndexOpcode()
501 case NVPTX::SUST_B_2D_ARRAY_V4B32_CLAMP_R: in sustRegisterToIndexOpcode()
503 case NVPTX::SUST_B_3D_B8_CLAMP_R: in sustRegisterToIndexOpcode()
505 case NVPTX::SUST_B_3D_B16_CLAMP_R: in sustRegisterToIndexOpcode()
507 case NVPTX::SUST_B_3D_B32_CLAMP_R: in sustRegisterToIndexOpcode()
509 case NVPTX::SUST_B_3D_B64_CLAMP_R: in sustRegisterToIndexOpcode()
511 case NVPTX::SUST_B_3D_V2B8_CLAMP_R: in sustRegisterToIndexOpcode()
513 case NVPTX::SUST_B_3D_V2B16_CLAMP_R: in sustRegisterToIndexOpcode()
515 case NVPTX::SUST_B_3D_V2B32_CLAMP_R: in sustRegisterToIndexOpcode()
517 case NVPTX::SUST_B_3D_V2B64_CLAMP_R: in sustRegisterToIndexOpcode()
519 case NVPTX::SUST_B_3D_V4B8_CLAMP_R: in sustRegisterToIndexOpcode()
521 case NVPTX::SUST_B_3D_V4B16_CLAMP_R: in sustRegisterToIndexOpcode()
523 case NVPTX::SUST_B_3D_V4B32_CLAMP_R: in sustRegisterToIndexOpcode()
525 case NVPTX::SUST_B_1D_B8_TRAP_R: in sustRegisterToIndexOpcode()
527 case NVPTX::SUST_B_1D_B16_TRAP_R: in sustRegisterToIndexOpcode()
529 case NVPTX::SUST_B_1D_B32_TRAP_R: in sustRegisterToIndexOpcode()
531 case NVPTX::SUST_B_1D_B64_TRAP_R: in sustRegisterToIndexOpcode()
533 case NVPTX::SUST_B_1D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
535 case NVPTX::SUST_B_1D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
537 case NVPTX::SUST_B_1D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
539 case NVPTX::SUST_B_1D_V2B64_TRAP_R: in sustRegisterToIndexOpcode()
541 case NVPTX::SUST_B_1D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
543 case NVPTX::SUST_B_1D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
545 case NVPTX::SUST_B_1D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
547 case NVPTX::SUST_B_1D_ARRAY_B8_TRAP_R: in sustRegisterToIndexOpcode()
549 case NVPTX::SUST_B_1D_ARRAY_B16_TRAP_R: in sustRegisterToIndexOpcode()
551 case NVPTX::SUST_B_1D_ARRAY_B32_TRAP_R: in sustRegisterToIndexOpcode()
553 case NVPTX::SUST_B_1D_ARRAY_B64_TRAP_R: in sustRegisterToIndexOpcode()
555 case NVPTX::SUST_B_1D_ARRAY_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
557 case NVPTX::SUST_B_1D_ARRAY_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
559 case NVPTX::SUST_B_1D_ARRAY_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
561 case NVPTX::SUST_B_1D_ARRAY_V2B64_TRAP_R: in sustRegisterToIndexOpcode()
563 case NVPTX::SUST_B_1D_ARRAY_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
565 case NVPTX::SUST_B_1D_ARRAY_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
567 case NVPTX::SUST_B_1D_ARRAY_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
569 case NVPTX::SUST_B_2D_B8_TRAP_R: in sustRegisterToIndexOpcode()
571 case NVPTX::SUST_B_2D_B16_TRAP_R: in sustRegisterToIndexOpcode()
573 case NVPTX::SUST_B_2D_B32_TRAP_R: in sustRegisterToIndexOpcode()
575 case NVPTX::SUST_B_2D_B64_TRAP_R: in sustRegisterToIndexOpcode()
577 case NVPTX::SUST_B_2D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
579 case NVPTX::SUST_B_2D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
581 case NVPTX::SUST_B_2D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
583 case NVPTX::SUST_B_2D_V2B64_TRAP_R: in sustRegisterToIndexOpcode()
585 case NVPTX::SUST_B_2D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
587 case NVPTX::SUST_B_2D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
589 case NVPTX::SUST_B_2D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
591 case NVPTX::SUST_B_2D_ARRAY_B8_TRAP_R: in sustRegisterToIndexOpcode()
593 case NVPTX::SUST_B_2D_ARRAY_B16_TRAP_R: in sustRegisterToIndexOpcode()
595 case NVPTX::SUST_B_2D_ARRAY_B32_TRAP_R: in sustRegisterToIndexOpcode()
597 case NVPTX::SUST_B_2D_ARRAY_B64_TRAP_R: in sustRegisterToIndexOpcode()
599 case NVPTX::SUST_B_2D_ARRAY_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
601 case NVPTX::SUST_B_2D_ARRAY_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
603 case NVPTX::SUST_B_2D_ARRAY_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
605 case NVPTX::SUST_B_2D_ARRAY_V2B64_TRAP_R: in sustRegisterToIndexOpcode()
607 case NVPTX::SUST_B_2D_ARRAY_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
609 case NVPTX::SUST_B_2D_ARRAY_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
611 case NVPTX::SUST_B_2D_ARRAY_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
613 case NVPTX::SUST_B_3D_B8_TRAP_R: in sustRegisterToIndexOpcode()
615 case NVPTX::SUST_B_3D_B16_TRAP_R: in sustRegisterToIndexOpcode()
617 case NVPTX::SUST_B_3D_B32_TRAP_R: in sustRegisterToIndexOpcode()
619 case NVPTX::SUST_B_3D_B64_TRAP_R: in sustRegisterToIndexOpcode()
621 case NVPTX::SUST_B_3D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
623 case NVPTX::SUST_B_3D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
625 case NVPTX::SUST_B_3D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
627 case NVPTX::SUST_B_3D_V2B64_TRAP_R: in sustRegisterToIndexOpcode()
629 case NVPTX::SUST_B_3D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
631 case NVPTX::SUST_B_3D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
633 case NVPTX::SUST_B_3D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
635 case NVPTX::SUST_B_1D_B8_ZERO_R: in sustRegisterToIndexOpcode()
637 case NVPTX::SUST_B_1D_B16_ZERO_R: in sustRegisterToIndexOpcode()
639 case NVPTX::SUST_B_1D_B32_ZERO_R: in sustRegisterToIndexOpcode()
641 case NVPTX::SUST_B_1D_B64_ZERO_R: in sustRegisterToIndexOpcode()
643 case NVPTX::SUST_B_1D_V2B8_ZERO_R: in sustRegisterToIndexOpcode()
645 case NVPTX::SUST_B_1D_V2B16_ZERO_R: in sustRegisterToIndexOpcode()
647 case NVPTX::SUST_B_1D_V2B32_ZERO_R: in sustRegisterToIndexOpcode()
649 case NVPTX::SUST_B_1D_V2B64_ZERO_R: in sustRegisterToIndexOpcode()
651 case NVPTX::SUST_B_1D_V4B8_ZERO_R: in sustRegisterToIndexOpcode()
653 case NVPTX::SUST_B_1D_V4B16_ZERO_R: in sustRegisterToIndexOpcode()
655 case NVPTX::SUST_B_1D_V4B32_ZERO_R: in sustRegisterToIndexOpcode()
657 case NVPTX::SUST_B_1D_ARRAY_B8_ZERO_R: in sustRegisterToIndexOpcode()
659 case NVPTX::SUST_B_1D_ARRAY_B16_ZERO_R: in sustRegisterToIndexOpcode()
661 case NVPTX::SUST_B_1D_ARRAY_B32_ZERO_R: in sustRegisterToIndexOpcode()
663 case NVPTX::SUST_B_1D_ARRAY_B64_ZERO_R: in sustRegisterToIndexOpcode()
665 case NVPTX::SUST_B_1D_ARRAY_V2B8_ZERO_R: in sustRegisterToIndexOpcode()
667 case NVPTX::SUST_B_1D_ARRAY_V2B16_ZERO_R: in sustRegisterToIndexOpcode()
669 case NVPTX::SUST_B_1D_ARRAY_V2B32_ZERO_R: in sustRegisterToIndexOpcode()
671 case NVPTX::SUST_B_1D_ARRAY_V2B64_ZERO_R: in sustRegisterToIndexOpcode()
673 case NVPTX::SUST_B_1D_ARRAY_V4B8_ZERO_R: in sustRegisterToIndexOpcode()
675 case NVPTX::SUST_B_1D_ARRAY_V4B16_ZERO_R: in sustRegisterToIndexOpcode()
677 case NVPTX::SUST_B_1D_ARRAY_V4B32_ZERO_R: in sustRegisterToIndexOpcode()
679 case NVPTX::SUST_B_2D_B8_ZERO_R: in sustRegisterToIndexOpcode()
681 case NVPTX::SUST_B_2D_B16_ZERO_R: in sustRegisterToIndexOpcode()
683 case NVPTX::SUST_B_2D_B32_ZERO_R: in sustRegisterToIndexOpcode()
685 case NVPTX::SUST_B_2D_B64_ZERO_R: in sustRegisterToIndexOpcode()
687 case NVPTX::SUST_B_2D_V2B8_ZERO_R: in sustRegisterToIndexOpcode()
689 case NVPTX::SUST_B_2D_V2B16_ZERO_R: in sustRegisterToIndexOpcode()
691 case NVPTX::SUST_B_2D_V2B32_ZERO_R: in sustRegisterToIndexOpcode()
693 case NVPTX::SUST_B_2D_V2B64_ZERO_R: in sustRegisterToIndexOpcode()
695 case NVPTX::SUST_B_2D_V4B8_ZERO_R: in sustRegisterToIndexOpcode()
697 case NVPTX::SUST_B_2D_V4B16_ZERO_R: in sustRegisterToIndexOpcode()
699 case NVPTX::SUST_B_2D_V4B32_ZERO_R: in sustRegisterToIndexOpcode()
701 case NVPTX::SUST_B_2D_ARRAY_B8_ZERO_R: in sustRegisterToIndexOpcode()
703 case NVPTX::SUST_B_2D_ARRAY_B16_ZERO_R: in sustRegisterToIndexOpcode()
705 case NVPTX::SUST_B_2D_ARRAY_B32_ZERO_R: in sustRegisterToIndexOpcode()
707 case NVPTX::SUST_B_2D_ARRAY_B64_ZERO_R: in sustRegisterToIndexOpcode()
709 case NVPTX::SUST_B_2D_ARRAY_V2B8_ZERO_R: in sustRegisterToIndexOpcode()
711 case NVPTX::SUST_B_2D_ARRAY_V2B16_ZERO_R: in sustRegisterToIndexOpcode()
713 case NVPTX::SUST_B_2D_ARRAY_V2B32_ZERO_R: in sustRegisterToIndexOpcode()
715 case NVPTX::SUST_B_2D_ARRAY_V2B64_ZERO_R: in sustRegisterToIndexOpcode()
717 case NVPTX::SUST_B_2D_ARRAY_V4B8_ZERO_R: in sustRegisterToIndexOpcode()
719 case NVPTX::SUST_B_2D_ARRAY_V4B16_ZERO_R: in sustRegisterToIndexOpcode()
721 case NVPTX::SUST_B_2D_ARRAY_V4B32_ZERO_R: in sustRegisterToIndexOpcode()
723 case NVPTX::SUST_B_3D_B8_ZERO_R: in sustRegisterToIndexOpcode()
725 case NVPTX::SUST_B_3D_B16_ZERO_R: in sustRegisterToIndexOpcode()
727 case NVPTX::SUST_B_3D_B32_ZERO_R: in sustRegisterToIndexOpcode()
729 case NVPTX::SUST_B_3D_B64_ZERO_R: in sustRegisterToIndexOpcode()
731 case NVPTX::SUST_B_3D_V2B8_ZERO_R: in sustRegisterToIndexOpcode()
733 case NVPTX::SUST_B_3D_V2B16_ZERO_R: in sustRegisterToIndexOpcode()
735 case NVPTX::SUST_B_3D_V2B32_ZERO_R: in sustRegisterToIndexOpcode()
737 case NVPTX::SUST_B_3D_V2B64_ZERO_R: in sustRegisterToIndexOpcode()
739 case NVPTX::SUST_B_3D_V4B8_ZERO_R: in sustRegisterToIndexOpcode()
741 case NVPTX::SUST_B_3D_V4B16_ZERO_R: in sustRegisterToIndexOpcode()
743 case NVPTX::SUST_B_3D_V4B32_ZERO_R: in sustRegisterToIndexOpcode()
745 case NVPTX::SUST_P_1D_B8_TRAP_R: in sustRegisterToIndexOpcode()
747 case NVPTX::SUST_P_1D_B16_TRAP_R: in sustRegisterToIndexOpcode()
749 case NVPTX::SUST_P_1D_B32_TRAP_R: in sustRegisterToIndexOpcode()
751 case NVPTX::SUST_P_1D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
753 case NVPTX::SUST_P_1D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
755 case NVPTX::SUST_P_1D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
757 case NVPTX::SUST_P_1D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
759 case NVPTX::SUST_P_1D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
761 case NVPTX::SUST_P_1D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
763 case NVPTX::SUST_P_1D_ARRAY_B8_TRAP_R: in sustRegisterToIndexOpcode()
765 case NVPTX::SUST_P_1D_ARRAY_B16_TRAP_R: in sustRegisterToIndexOpcode()
767 case NVPTX::SUST_P_1D_ARRAY_B32_TRAP_R: in sustRegisterToIndexOpcode()
769 case NVPTX::SUST_P_1D_ARRAY_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
771 case NVPTX::SUST_P_1D_ARRAY_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
773 case NVPTX::SUST_P_1D_ARRAY_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
775 case NVPTX::SUST_P_1D_ARRAY_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
777 case NVPTX::SUST_P_1D_ARRAY_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
779 case NVPTX::SUST_P_1D_ARRAY_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
781 case NVPTX::SUST_P_2D_B8_TRAP_R: in sustRegisterToIndexOpcode()
783 case NVPTX::SUST_P_2D_B16_TRAP_R: in sustRegisterToIndexOpcode()
785 case NVPTX::SUST_P_2D_B32_TRAP_R: in sustRegisterToIndexOpcode()
787 case NVPTX::SUST_P_2D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
789 case NVPTX::SUST_P_2D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
791 case NVPTX::SUST_P_2D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
793 case NVPTX::SUST_P_2D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
795 case NVPTX::SUST_P_2D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
797 case NVPTX::SUST_P_2D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
799 case NVPTX::SUST_P_2D_ARRAY_B8_TRAP_R: in sustRegisterToIndexOpcode()
801 case NVPTX::SUST_P_2D_ARRAY_B16_TRAP_R: in sustRegisterToIndexOpcode()
803 case NVPTX::SUST_P_2D_ARRAY_B32_TRAP_R: in sustRegisterToIndexOpcode()
805 case NVPTX::SUST_P_2D_ARRAY_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
807 case NVPTX::SUST_P_2D_ARRAY_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
809 case NVPTX::SUST_P_2D_ARRAY_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
811 case NVPTX::SUST_P_2D_ARRAY_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
813 case NVPTX::SUST_P_2D_ARRAY_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
815 case NVPTX::SUST_P_2D_ARRAY_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
817 case NVPTX::SUST_P_3D_B8_TRAP_R: in sustRegisterToIndexOpcode()
819 case NVPTX::SUST_P_3D_B16_TRAP_R: in sustRegisterToIndexOpcode()
821 case NVPTX::SUST_P_3D_B32_TRAP_R: in sustRegisterToIndexOpcode()
823 case NVPTX::SUST_P_3D_V2B8_TRAP_R: in sustRegisterToIndexOpcode()
825 case NVPTX::SUST_P_3D_V2B16_TRAP_R: in sustRegisterToIndexOpcode()
827 case NVPTX::SUST_P_3D_V2B32_TRAP_R: in sustRegisterToIndexOpcode()
829 case NVPTX::SUST_P_3D_V4B8_TRAP_R: in sustRegisterToIndexOpcode()
831 case NVPTX::SUST_P_3D_V4B16_TRAP_R: in sustRegisterToIndexOpcode()
833 case NVPTX::SUST_P_3D_V4B32_TRAP_R: in sustRegisterToIndexOpcode()
842 case NVPTX::TEX_1D_F32_S32_RR: in texRegisterToIndexOpcode()
844 case NVPTX::TEX_1D_F32_S32_RI: in texRegisterToIndexOpcode()
846 case NVPTX::TEX_1D_F32_F32_RR: in texRegisterToIndexOpcode()
848 case NVPTX::TEX_1D_F32_F32_RI: in texRegisterToIndexOpcode()
850 case NVPTX::TEX_1D_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
852 case NVPTX::TEX_1D_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
854 case NVPTX::TEX_1D_F32_F32_GRAD_RR: in texRegisterToIndexOpcode()
856 case NVPTX::TEX_1D_F32_F32_GRAD_RI: in texRegisterToIndexOpcode()
858 case NVPTX::TEX_1D_S32_S32_RR: in texRegisterToIndexOpcode()
860 case NVPTX::TEX_1D_S32_S32_RI: in texRegisterToIndexOpcode()
862 case NVPTX::TEX_1D_S32_F32_RR: in texRegisterToIndexOpcode()
864 case NVPTX::TEX_1D_S32_F32_RI: in texRegisterToIndexOpcode()
866 case NVPTX::TEX_1D_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
868 case NVPTX::TEX_1D_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
870 case NVPTX::TEX_1D_S32_F32_GRAD_RR: in texRegisterToIndexOpcode()
872 case NVPTX::TEX_1D_S32_F32_GRAD_RI: in texRegisterToIndexOpcode()
874 case NVPTX::TEX_1D_U32_S32_RR: in texRegisterToIndexOpcode()
876 case NVPTX::TEX_1D_U32_S32_RI: in texRegisterToIndexOpcode()
878 case NVPTX::TEX_1D_U32_F32_RR: in texRegisterToIndexOpcode()
880 case NVPTX::TEX_1D_U32_F32_RI: in texRegisterToIndexOpcode()
882 case NVPTX::TEX_1D_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
884 case NVPTX::TEX_1D_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
886 case NVPTX::TEX_1D_U32_F32_GRAD_RR: in texRegisterToIndexOpcode()
888 case NVPTX::TEX_1D_U32_F32_GRAD_RI: in texRegisterToIndexOpcode()
890 case NVPTX::TEX_1D_ARRAY_F32_S32_RR: in texRegisterToIndexOpcode()
892 case NVPTX::TEX_1D_ARRAY_F32_S32_RI: in texRegisterToIndexOpcode()
894 case NVPTX::TEX_1D_ARRAY_F32_F32_RR: in texRegisterToIndexOpcode()
896 case NVPTX::TEX_1D_ARRAY_F32_F32_RI: in texRegisterToIndexOpcode()
898 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
900 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
902 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RR: in texRegisterToIndexOpcode()
904 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RI: in texRegisterToIndexOpcode()
906 case NVPTX::TEX_1D_ARRAY_S32_S32_RR: in texRegisterToIndexOpcode()
908 case NVPTX::TEX_1D_ARRAY_S32_S32_RI: in texRegisterToIndexOpcode()
910 case NVPTX::TEX_1D_ARRAY_S32_F32_RR: in texRegisterToIndexOpcode()
912 case NVPTX::TEX_1D_ARRAY_S32_F32_RI: in texRegisterToIndexOpcode()
914 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
916 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
918 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RR: in texRegisterToIndexOpcode()
920 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RI: in texRegisterToIndexOpcode()
922 case NVPTX::TEX_1D_ARRAY_U32_S32_RR: in texRegisterToIndexOpcode()
924 case NVPTX::TEX_1D_ARRAY_U32_S32_RI: in texRegisterToIndexOpcode()
926 case NVPTX::TEX_1D_ARRAY_U32_F32_RR: in texRegisterToIndexOpcode()
928 case NVPTX::TEX_1D_ARRAY_U32_F32_RI: in texRegisterToIndexOpcode()
930 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
932 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
934 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RR: in texRegisterToIndexOpcode()
936 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RI: in texRegisterToIndexOpcode()
938 case NVPTX::TEX_2D_F32_S32_RR: in texRegisterToIndexOpcode()
940 case NVPTX::TEX_2D_F32_S32_RI: in texRegisterToIndexOpcode()
942 case NVPTX::TEX_2D_F32_F32_RR: in texRegisterToIndexOpcode()
944 case NVPTX::TEX_2D_F32_F32_RI: in texRegisterToIndexOpcode()
946 case NVPTX::TEX_2D_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
948 case NVPTX::TEX_2D_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
950 case NVPTX::TEX_2D_F32_F32_GRAD_RR: in texRegisterToIndexOpcode()
952 case NVPTX::TEX_2D_F32_F32_GRAD_RI: in texRegisterToIndexOpcode()
954 case NVPTX::TEX_2D_S32_S32_RR: in texRegisterToIndexOpcode()
956 case NVPTX::TEX_2D_S32_S32_RI: in texRegisterToIndexOpcode()
958 case NVPTX::TEX_2D_S32_F32_RR: in texRegisterToIndexOpcode()
960 case NVPTX::TEX_2D_S32_F32_RI: in texRegisterToIndexOpcode()
962 case NVPTX::TEX_2D_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
964 case NVPTX::TEX_2D_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
966 case NVPTX::TEX_2D_S32_F32_GRAD_RR: in texRegisterToIndexOpcode()
968 case NVPTX::TEX_2D_S32_F32_GRAD_RI: in texRegisterToIndexOpcode()
970 case NVPTX::TEX_2D_U32_S32_RR: in texRegisterToIndexOpcode()
972 case NVPTX::TEX_2D_U32_S32_RI: in texRegisterToIndexOpcode()
974 case NVPTX::TEX_2D_U32_F32_RR: in texRegisterToIndexOpcode()
976 case NVPTX::TEX_2D_U32_F32_RI: in texRegisterToIndexOpcode()
978 case NVPTX::TEX_2D_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
980 case NVPTX::TEX_2D_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
982 case NVPTX::TEX_2D_U32_F32_GRAD_RR: in texRegisterToIndexOpcode()
984 case NVPTX::TEX_2D_U32_F32_GRAD_RI: in texRegisterToIndexOpcode()
986 case NVPTX::TEX_2D_ARRAY_F32_S32_RR: in texRegisterToIndexOpcode()
988 case NVPTX::TEX_2D_ARRAY_F32_S32_RI: in texRegisterToIndexOpcode()
990 case NVPTX::TEX_2D_ARRAY_F32_F32_RR: in texRegisterToIndexOpcode()
992 case NVPTX::TEX_2D_ARRAY_F32_F32_RI: in texRegisterToIndexOpcode()
994 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
996 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
998 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1000 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1002 case NVPTX::TEX_2D_ARRAY_S32_S32_RR: in texRegisterToIndexOpcode()
1004 case NVPTX::TEX_2D_ARRAY_S32_S32_RI: in texRegisterToIndexOpcode()
1006 case NVPTX::TEX_2D_ARRAY_S32_F32_RR: in texRegisterToIndexOpcode()
1008 case NVPTX::TEX_2D_ARRAY_S32_F32_RI: in texRegisterToIndexOpcode()
1010 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1012 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1014 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1016 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1018 case NVPTX::TEX_2D_ARRAY_U32_S32_RR: in texRegisterToIndexOpcode()
1020 case NVPTX::TEX_2D_ARRAY_U32_S32_RI: in texRegisterToIndexOpcode()
1022 case NVPTX::TEX_2D_ARRAY_U32_F32_RR: in texRegisterToIndexOpcode()
1024 case NVPTX::TEX_2D_ARRAY_U32_F32_RI: in texRegisterToIndexOpcode()
1026 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1028 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1030 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1032 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1034 case NVPTX::TEX_3D_F32_S32_RR: in texRegisterToIndexOpcode()
1036 case NVPTX::TEX_3D_F32_S32_RI: in texRegisterToIndexOpcode()
1038 case NVPTX::TEX_3D_F32_F32_RR: in texRegisterToIndexOpcode()
1040 case NVPTX::TEX_3D_F32_F32_RI: in texRegisterToIndexOpcode()
1042 case NVPTX::TEX_3D_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1044 case NVPTX::TEX_3D_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1046 case NVPTX::TEX_3D_F32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1048 case NVPTX::TEX_3D_F32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1050 case NVPTX::TEX_3D_S32_S32_RR: in texRegisterToIndexOpcode()
1052 case NVPTX::TEX_3D_S32_S32_RI: in texRegisterToIndexOpcode()
1054 case NVPTX::TEX_3D_S32_F32_RR: in texRegisterToIndexOpcode()
1056 case NVPTX::TEX_3D_S32_F32_RI: in texRegisterToIndexOpcode()
1058 case NVPTX::TEX_3D_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1060 case NVPTX::TEX_3D_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1062 case NVPTX::TEX_3D_S32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1064 case NVPTX::TEX_3D_S32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1066 case NVPTX::TEX_3D_U32_S32_RR: in texRegisterToIndexOpcode()
1068 case NVPTX::TEX_3D_U32_S32_RI: in texRegisterToIndexOpcode()
1070 case NVPTX::TEX_3D_U32_F32_RR: in texRegisterToIndexOpcode()
1072 case NVPTX::TEX_3D_U32_F32_RI: in texRegisterToIndexOpcode()
1074 case NVPTX::TEX_3D_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1076 case NVPTX::TEX_3D_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1078 case NVPTX::TEX_3D_U32_F32_GRAD_RR: in texRegisterToIndexOpcode()
1080 case NVPTX::TEX_3D_U32_F32_GRAD_RI: in texRegisterToIndexOpcode()
1082 case NVPTX::TEX_CUBE_F32_F32_RR: in texRegisterToIndexOpcode()
1084 case NVPTX::TEX_CUBE_F32_F32_RI: in texRegisterToIndexOpcode()
1086 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1088 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1090 case NVPTX::TEX_CUBE_S32_F32_RR: in texRegisterToIndexOpcode()
1092 case NVPTX::TEX_CUBE_S32_F32_RI: in texRegisterToIndexOpcode()
1094 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1096 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1098 case NVPTX::TEX_CUBE_U32_F32_RR: in texRegisterToIndexOpcode()
1100 case NVPTX::TEX_CUBE_U32_F32_RI: in texRegisterToIndexOpcode()
1102 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1104 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1106 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RR: in texRegisterToIndexOpcode()
1108 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RI: in texRegisterToIndexOpcode()
1110 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1112 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1114 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RR: in texRegisterToIndexOpcode()
1116 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RI: in texRegisterToIndexOpcode()
1118 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1120 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1122 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RR: in texRegisterToIndexOpcode()
1124 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RI: in texRegisterToIndexOpcode()
1126 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RR: in texRegisterToIndexOpcode()
1128 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RI: in texRegisterToIndexOpcode()
1130 case NVPTX::TLD4_R_2D_F32_F32_RR: in texRegisterToIndexOpcode()
1132 case NVPTX::TLD4_R_2D_F32_F32_RI: in texRegisterToIndexOpcode()
1134 case NVPTX::TLD4_G_2D_F32_F32_RR: in texRegisterToIndexOpcode()
1136 case NVPTX::TLD4_G_2D_F32_F32_RI: in texRegisterToIndexOpcode()
1138 case NVPTX::TLD4_B_2D_F32_F32_RR: in texRegisterToIndexOpcode()
1140 case NVPTX::TLD4_B_2D_F32_F32_RI: in texRegisterToIndexOpcode()
1142 case NVPTX::TLD4_A_2D_F32_F32_RR: in texRegisterToIndexOpcode()
1144 case NVPTX::TLD4_A_2D_F32_F32_RI: in texRegisterToIndexOpcode()
1146 case NVPTX::TLD4_R_2D_S32_F32_RR: in texRegisterToIndexOpcode()
1148 case NVPTX::TLD4_R_2D_S32_F32_RI: in texRegisterToIndexOpcode()
1150 case NVPTX::TLD4_G_2D_S32_F32_RR: in texRegisterToIndexOpcode()
1152 case NVPTX::TLD4_G_2D_S32_F32_RI: in texRegisterToIndexOpcode()
1154 case NVPTX::TLD4_B_2D_S32_F32_RR: in texRegisterToIndexOpcode()
1156 case NVPTX::TLD4_B_2D_S32_F32_RI: in texRegisterToIndexOpcode()
1158 case NVPTX::TLD4_A_2D_S32_F32_RR: in texRegisterToIndexOpcode()
1160 case NVPTX::TLD4_A_2D_S32_F32_RI: in texRegisterToIndexOpcode()
1162 case NVPTX::TLD4_R_2D_U32_F32_RR: in texRegisterToIndexOpcode()
1164 case NVPTX::TLD4_R_2D_U32_F32_RI: in texRegisterToIndexOpcode()
1166 case NVPTX::TLD4_G_2D_U32_F32_RR: in texRegisterToIndexOpcode()
1168 case NVPTX::TLD4_G_2D_U32_F32_RI: in texRegisterToIndexOpcode()
1170 case NVPTX::TLD4_B_2D_U32_F32_RR: in texRegisterToIndexOpcode()
1172 case NVPTX::TLD4_B_2D_U32_F32_RI: in texRegisterToIndexOpcode()
1174 case NVPTX::TLD4_A_2D_U32_F32_RR: in texRegisterToIndexOpcode()
1176 case NVPTX::TLD4_A_2D_U32_F32_RI: in texRegisterToIndexOpcode()
1178 case NVPTX::TEX_UNIFIED_1D_F32_S32_R: in texRegisterToIndexOpcode()
1180 case NVPTX::TEX_UNIFIED_1D_F32_F32_R: in texRegisterToIndexOpcode()
1182 case NVPTX::TEX_UNIFIED_1D_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1184 case NVPTX::TEX_UNIFIED_1D_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1186 case NVPTX::TEX_UNIFIED_1D_S32_S32_R: in texRegisterToIndexOpcode()
1188 case NVPTX::TEX_UNIFIED_1D_S32_F32_R: in texRegisterToIndexOpcode()
1190 case NVPTX::TEX_UNIFIED_1D_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1192 case NVPTX::TEX_UNIFIED_1D_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1194 case NVPTX::TEX_UNIFIED_1D_U32_S32_R: in texRegisterToIndexOpcode()
1196 case NVPTX::TEX_UNIFIED_1D_U32_F32_R: in texRegisterToIndexOpcode()
1198 case NVPTX::TEX_UNIFIED_1D_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1200 case NVPTX::TEX_UNIFIED_1D_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1202 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_S32_R: in texRegisterToIndexOpcode()
1204 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_R: in texRegisterToIndexOpcode()
1206 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1208 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1210 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_S32_R: in texRegisterToIndexOpcode()
1212 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_R: in texRegisterToIndexOpcode()
1214 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1216 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1218 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_S32_R: in texRegisterToIndexOpcode()
1220 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_R: in texRegisterToIndexOpcode()
1222 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1224 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1226 case NVPTX::TEX_UNIFIED_2D_F32_S32_R: in texRegisterToIndexOpcode()
1228 case NVPTX::TEX_UNIFIED_2D_F32_F32_R: in texRegisterToIndexOpcode()
1230 case NVPTX::TEX_UNIFIED_2D_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1232 case NVPTX::TEX_UNIFIED_2D_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1234 case NVPTX::TEX_UNIFIED_2D_S32_S32_R: in texRegisterToIndexOpcode()
1236 case NVPTX::TEX_UNIFIED_2D_S32_F32_R: in texRegisterToIndexOpcode()
1238 case NVPTX::TEX_UNIFIED_2D_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1240 case NVPTX::TEX_UNIFIED_2D_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1242 case NVPTX::TEX_UNIFIED_2D_U32_S32_R: in texRegisterToIndexOpcode()
1244 case NVPTX::TEX_UNIFIED_2D_U32_F32_R: in texRegisterToIndexOpcode()
1246 case NVPTX::TEX_UNIFIED_2D_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1248 case NVPTX::TEX_UNIFIED_2D_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1250 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_S32_R: in texRegisterToIndexOpcode()
1252 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_R: in texRegisterToIndexOpcode()
1254 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1256 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1258 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_S32_R: in texRegisterToIndexOpcode()
1260 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_R: in texRegisterToIndexOpcode()
1262 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1264 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1266 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_S32_R: in texRegisterToIndexOpcode()
1268 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_R: in texRegisterToIndexOpcode()
1270 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1272 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1274 case NVPTX::TEX_UNIFIED_3D_F32_S32_R: in texRegisterToIndexOpcode()
1276 case NVPTX::TEX_UNIFIED_3D_F32_F32_R: in texRegisterToIndexOpcode()
1278 case NVPTX::TEX_UNIFIED_3D_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1280 case NVPTX::TEX_UNIFIED_3D_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1282 case NVPTX::TEX_UNIFIED_3D_S32_S32_R: in texRegisterToIndexOpcode()
1284 case NVPTX::TEX_UNIFIED_3D_S32_F32_R: in texRegisterToIndexOpcode()
1286 case NVPTX::TEX_UNIFIED_3D_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1288 case NVPTX::TEX_UNIFIED_3D_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1290 case NVPTX::TEX_UNIFIED_3D_U32_S32_R: in texRegisterToIndexOpcode()
1292 case NVPTX::TEX_UNIFIED_3D_U32_F32_R: in texRegisterToIndexOpcode()
1294 case NVPTX::TEX_UNIFIED_3D_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1296 case NVPTX::TEX_UNIFIED_3D_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1298 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_R: in texRegisterToIndexOpcode()
1300 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1302 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_R: in texRegisterToIndexOpcode()
1304 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1306 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_R: in texRegisterToIndexOpcode()
1308 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1310 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_R: in texRegisterToIndexOpcode()
1312 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1314 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_R: in texRegisterToIndexOpcode()
1316 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1318 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_R: in texRegisterToIndexOpcode()
1320 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_LEVEL_R: in texRegisterToIndexOpcode()
1322 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1324 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1326 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1328 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_GRAD_R: in texRegisterToIndexOpcode()
1330 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_GRAD_R: in texRegisterToIndexOpcode()
1332 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_GRAD_R: in texRegisterToIndexOpcode()
1334 case NVPTX::TLD4_UNIFIED_R_2D_F32_F32_R: in texRegisterToIndexOpcode()
1336 case NVPTX::TLD4_UNIFIED_G_2D_F32_F32_R: in texRegisterToIndexOpcode()
1338 case NVPTX::TLD4_UNIFIED_B_2D_F32_F32_R: in texRegisterToIndexOpcode()
1340 case NVPTX::TLD4_UNIFIED_A_2D_F32_F32_R: in texRegisterToIndexOpcode()
1342 case NVPTX::TLD4_UNIFIED_R_2D_S32_F32_R: in texRegisterToIndexOpcode()
1344 case NVPTX::TLD4_UNIFIED_G_2D_S32_F32_R: in texRegisterToIndexOpcode()
1346 case NVPTX::TLD4_UNIFIED_B_2D_S32_F32_R: in texRegisterToIndexOpcode()
1348 case NVPTX::TLD4_UNIFIED_A_2D_S32_F32_R: in texRegisterToIndexOpcode()
1350 case NVPTX::TLD4_UNIFIED_R_2D_U32_F32_R: in texRegisterToIndexOpcode()
1352 case NVPTX::TLD4_UNIFIED_G_2D_U32_F32_R: in texRegisterToIndexOpcode()
1354 case NVPTX::TLD4_UNIFIED_B_2D_U32_F32_R: in texRegisterToIndexOpcode()
1356 case NVPTX::TLD4_UNIFIED_A_2D_U32_F32_R: in texRegisterToIndexOpcode()
1365 case NVPTX::TEX_1D_F32_S32_RR: in samplerRegisterToIndexOpcode()
1367 case NVPTX::TEX_1D_F32_S32_IR: in samplerRegisterToIndexOpcode()
1369 case NVPTX::TEX_1D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1371 case NVPTX::TEX_1D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1373 case NVPTX::TEX_1D_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1375 case NVPTX::TEX_1D_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1377 case NVPTX::TEX_1D_F32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1379 case NVPTX::TEX_1D_F32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1381 case NVPTX::TEX_1D_S32_S32_RR: in samplerRegisterToIndexOpcode()
1383 case NVPTX::TEX_1D_S32_S32_IR: in samplerRegisterToIndexOpcode()
1385 case NVPTX::TEX_1D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1387 case NVPTX::TEX_1D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1389 case NVPTX::TEX_1D_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1391 case NVPTX::TEX_1D_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1393 case NVPTX::TEX_1D_S32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1395 case NVPTX::TEX_1D_S32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1397 case NVPTX::TEX_1D_U32_S32_RR: in samplerRegisterToIndexOpcode()
1399 case NVPTX::TEX_1D_U32_S32_IR: in samplerRegisterToIndexOpcode()
1401 case NVPTX::TEX_1D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1403 case NVPTX::TEX_1D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1405 case NVPTX::TEX_1D_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1407 case NVPTX::TEX_1D_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1409 case NVPTX::TEX_1D_U32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1411 case NVPTX::TEX_1D_U32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1413 case NVPTX::TEX_1D_ARRAY_F32_S32_RR: in samplerRegisterToIndexOpcode()
1415 case NVPTX::TEX_1D_ARRAY_F32_S32_IR: in samplerRegisterToIndexOpcode()
1417 case NVPTX::TEX_1D_ARRAY_F32_F32_RR: in samplerRegisterToIndexOpcode()
1419 case NVPTX::TEX_1D_ARRAY_F32_F32_IR: in samplerRegisterToIndexOpcode()
1421 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1423 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1425 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1427 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1429 case NVPTX::TEX_1D_ARRAY_S32_S32_RR: in samplerRegisterToIndexOpcode()
1431 case NVPTX::TEX_1D_ARRAY_S32_S32_IR: in samplerRegisterToIndexOpcode()
1433 case NVPTX::TEX_1D_ARRAY_S32_F32_RR: in samplerRegisterToIndexOpcode()
1435 case NVPTX::TEX_1D_ARRAY_S32_F32_IR: in samplerRegisterToIndexOpcode()
1437 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1439 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1441 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1443 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1445 case NVPTX::TEX_1D_ARRAY_U32_S32_RR: in samplerRegisterToIndexOpcode()
1447 case NVPTX::TEX_1D_ARRAY_U32_S32_IR: in samplerRegisterToIndexOpcode()
1449 case NVPTX::TEX_1D_ARRAY_U32_F32_RR: in samplerRegisterToIndexOpcode()
1451 case NVPTX::TEX_1D_ARRAY_U32_F32_IR: in samplerRegisterToIndexOpcode()
1453 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1455 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1457 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1459 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1461 case NVPTX::TEX_2D_F32_S32_RR: in samplerRegisterToIndexOpcode()
1463 case NVPTX::TEX_2D_F32_S32_IR: in samplerRegisterToIndexOpcode()
1465 case NVPTX::TEX_2D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1467 case NVPTX::TEX_2D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1469 case NVPTX::TEX_2D_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1471 case NVPTX::TEX_2D_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1473 case NVPTX::TEX_2D_F32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1475 case NVPTX::TEX_2D_F32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1477 case NVPTX::TEX_2D_S32_S32_RR: in samplerRegisterToIndexOpcode()
1479 case NVPTX::TEX_2D_S32_S32_IR: in samplerRegisterToIndexOpcode()
1481 case NVPTX::TEX_2D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1483 case NVPTX::TEX_2D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1485 case NVPTX::TEX_2D_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1487 case NVPTX::TEX_2D_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1489 case NVPTX::TEX_2D_S32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1491 case NVPTX::TEX_2D_S32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1493 case NVPTX::TEX_2D_U32_S32_RR: in samplerRegisterToIndexOpcode()
1495 case NVPTX::TEX_2D_U32_S32_IR: in samplerRegisterToIndexOpcode()
1497 case NVPTX::TEX_2D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1499 case NVPTX::TEX_2D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1501 case NVPTX::TEX_2D_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1503 case NVPTX::TEX_2D_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1505 case NVPTX::TEX_2D_U32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1507 case NVPTX::TEX_2D_U32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1509 case NVPTX::TEX_2D_ARRAY_F32_S32_RR: in samplerRegisterToIndexOpcode()
1511 case NVPTX::TEX_2D_ARRAY_F32_S32_IR: in samplerRegisterToIndexOpcode()
1513 case NVPTX::TEX_2D_ARRAY_F32_F32_RR: in samplerRegisterToIndexOpcode()
1515 case NVPTX::TEX_2D_ARRAY_F32_F32_IR: in samplerRegisterToIndexOpcode()
1517 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1519 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1521 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1523 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1525 case NVPTX::TEX_2D_ARRAY_S32_S32_RR: in samplerRegisterToIndexOpcode()
1527 case NVPTX::TEX_2D_ARRAY_S32_S32_IR: in samplerRegisterToIndexOpcode()
1529 case NVPTX::TEX_2D_ARRAY_S32_F32_RR: in samplerRegisterToIndexOpcode()
1531 case NVPTX::TEX_2D_ARRAY_S32_F32_IR: in samplerRegisterToIndexOpcode()
1533 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1535 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1537 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1539 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1541 case NVPTX::TEX_2D_ARRAY_U32_S32_RR: in samplerRegisterToIndexOpcode()
1543 case NVPTX::TEX_2D_ARRAY_U32_S32_IR: in samplerRegisterToIndexOpcode()
1545 case NVPTX::TEX_2D_ARRAY_U32_F32_RR: in samplerRegisterToIndexOpcode()
1547 case NVPTX::TEX_2D_ARRAY_U32_F32_IR: in samplerRegisterToIndexOpcode()
1549 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1551 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1553 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1555 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1557 case NVPTX::TEX_3D_F32_S32_RR: in samplerRegisterToIndexOpcode()
1559 case NVPTX::TEX_3D_F32_S32_IR: in samplerRegisterToIndexOpcode()
1561 case NVPTX::TEX_3D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1563 case NVPTX::TEX_3D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1565 case NVPTX::TEX_3D_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1567 case NVPTX::TEX_3D_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1569 case NVPTX::TEX_3D_F32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1571 case NVPTX::TEX_3D_F32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1573 case NVPTX::TEX_3D_S32_S32_RR: in samplerRegisterToIndexOpcode()
1575 case NVPTX::TEX_3D_S32_S32_IR: in samplerRegisterToIndexOpcode()
1577 case NVPTX::TEX_3D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1579 case NVPTX::TEX_3D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1581 case NVPTX::TEX_3D_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1583 case NVPTX::TEX_3D_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1585 case NVPTX::TEX_3D_S32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1587 case NVPTX::TEX_3D_S32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1589 case NVPTX::TEX_3D_U32_S32_RR: in samplerRegisterToIndexOpcode()
1591 case NVPTX::TEX_3D_U32_S32_IR: in samplerRegisterToIndexOpcode()
1593 case NVPTX::TEX_3D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1595 case NVPTX::TEX_3D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1597 case NVPTX::TEX_3D_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1599 case NVPTX::TEX_3D_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1601 case NVPTX::TEX_3D_U32_F32_GRAD_RR: in samplerRegisterToIndexOpcode()
1603 case NVPTX::TEX_3D_U32_F32_GRAD_IR: in samplerRegisterToIndexOpcode()
1605 case NVPTX::TEX_CUBE_F32_F32_RR: in samplerRegisterToIndexOpcode()
1607 case NVPTX::TEX_CUBE_F32_F32_IR: in samplerRegisterToIndexOpcode()
1609 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1611 case NVPTX::TEX_CUBE_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1613 case NVPTX::TEX_CUBE_S32_F32_RR: in samplerRegisterToIndexOpcode()
1615 case NVPTX::TEX_CUBE_S32_F32_IR: in samplerRegisterToIndexOpcode()
1617 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1619 case NVPTX::TEX_CUBE_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1621 case NVPTX::TEX_CUBE_U32_F32_RR: in samplerRegisterToIndexOpcode()
1623 case NVPTX::TEX_CUBE_U32_F32_IR: in samplerRegisterToIndexOpcode()
1625 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1627 case NVPTX::TEX_CUBE_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1629 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RR: in samplerRegisterToIndexOpcode()
1631 case NVPTX::TEX_CUBE_ARRAY_F32_F32_IR: in samplerRegisterToIndexOpcode()
1633 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1635 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1637 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RR: in samplerRegisterToIndexOpcode()
1639 case NVPTX::TEX_CUBE_ARRAY_S32_F32_IR: in samplerRegisterToIndexOpcode()
1641 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1643 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1645 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RR: in samplerRegisterToIndexOpcode()
1647 case NVPTX::TEX_CUBE_ARRAY_U32_F32_IR: in samplerRegisterToIndexOpcode()
1649 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RR: in samplerRegisterToIndexOpcode()
1651 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_IR: in samplerRegisterToIndexOpcode()
1653 case NVPTX::TLD4_R_2D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1655 case NVPTX::TLD4_R_2D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1657 case NVPTX::TLD4_G_2D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1659 case NVPTX::TLD4_G_2D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1661 case NVPTX::TLD4_B_2D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1663 case NVPTX::TLD4_B_2D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1665 case NVPTX::TLD4_A_2D_F32_F32_RR: in samplerRegisterToIndexOpcode()
1667 case NVPTX::TLD4_A_2D_F32_F32_IR: in samplerRegisterToIndexOpcode()
1669 case NVPTX::TLD4_R_2D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1671 case NVPTX::TLD4_R_2D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1673 case NVPTX::TLD4_G_2D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1675 case NVPTX::TLD4_G_2D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1677 case NVPTX::TLD4_B_2D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1679 case NVPTX::TLD4_B_2D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1681 case NVPTX::TLD4_A_2D_S32_F32_RR: in samplerRegisterToIndexOpcode()
1683 case NVPTX::TLD4_A_2D_S32_F32_IR: in samplerRegisterToIndexOpcode()
1685 case NVPTX::TLD4_R_2D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1687 case NVPTX::TLD4_R_2D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1689 case NVPTX::TLD4_G_2D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1691 case NVPTX::TLD4_G_2D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1693 case NVPTX::TLD4_B_2D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1695 case NVPTX::TLD4_B_2D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1697 case NVPTX::TLD4_A_2D_U32_F32_RR: in samplerRegisterToIndexOpcode()
1699 case NVPTX::TLD4_A_2D_U32_F32_IR: in samplerRegisterToIndexOpcode()
1708 case NVPTX::TXQ_CHANNEL_ORDER_R: in queryRegisterToIndexOpcode()
1710 case NVPTX::TXQ_CHANNEL_DATA_TYPE_R: in queryRegisterToIndexOpcode()
1712 case NVPTX::TXQ_WIDTH_R: in queryRegisterToIndexOpcode()
1714 case NVPTX::TXQ_HEIGHT_R: in queryRegisterToIndexOpcode()
1716 case NVPTX::TXQ_DEPTH_R: in queryRegisterToIndexOpcode()
1718 case NVPTX::TXQ_ARRAY_SIZE_R: in queryRegisterToIndexOpcode()
1720 case NVPTX::TXQ_NUM_SAMPLES_R: in queryRegisterToIndexOpcode()
1722 case NVPTX::TXQ_NUM_MIPMAP_LEVELS_R: in queryRegisterToIndexOpcode()
1724 case NVPTX::SUQ_CHANNEL_ORDER_R: in queryRegisterToIndexOpcode()
1726 case NVPTX::SUQ_CHANNEL_DATA_TYPE_R: in queryRegisterToIndexOpcode()
1728 case NVPTX::SUQ_WIDTH_R: in queryRegisterToIndexOpcode()
1730 case NVPTX::SUQ_HEIGHT_R: in queryRegisterToIndexOpcode()
1732 case NVPTX::SUQ_DEPTH_R: in queryRegisterToIndexOpcode()
1734 case NVPTX::SUQ_ARRAY_SIZE_R: in queryRegisterToIndexOpcode()
1813 case NVPTX::LD_i64_avar: { in findIndexForHandle()
1837 case NVPTX::texsurf_handles: { in findIndexForHandle()
1846 case NVPTX::nvvm_move_i64: in findIndexForHandle()
1847 case TargetOpcode::COPY: { in findIndexForHandle()