Lines Matching defs:VecTy

87     for (const auto &VecTy : VecTys) {
88       addRegisterClass(VecTy, &Mips::DSPRRegClass);
92         setOperationAction(Opc, VecTy, Expand);
94       setOperationAction(ISD::ADD, VecTy, Legal);
95       setOperationAction(ISD::SUB, VecTy, Legal);
96       setOperationAction(ISD::LOAD, VecTy, Legal);
97       setOperationAction(ISD::STORE, VecTy, Legal);
98       setOperationAction(ISD::BITCAST, VecTy, Legal);
1422 static SDValue getBuildVectorSplat(EVT VecTy, SDValue SplatValue,
1424   EVT ViaVecTy = VecTy;
1429   if (VecTy == MVT::v2i64) {
1452   if (VecTy != ViaVecTy)
1453     Result = DAG.getNode(ISD::BITCAST, DL, VecTy, Result);
1461   EVT VecTy = Op->getValueType(0);
1467   if (VecTy == MVT::v2i64) {
1490     if (VecTy == MVT::v2i64)
1493     Exp2Imm = getBuildVectorSplat(VecTy, Imm, BigEndian, DAG);
1495     Exp2Imm = DAG.getNode(ISD::SHL, DL, VecTy, DAG.getConstant(1, DL, VecTy),
1499   return DAG.getNode(Opc, DL, VecTy, Op->getOperand(1), Exp2Imm);
1607     EVT VecTy = Op->getValueType(0);
1608     EVT EltTy = VecTy.getVectorElementType();
1613     return DAG.getNode(ISD::VSELECT, DL, VecTy,
1614                        DAG.getConstant(Mask, DL, VecTy, true),
1622     EVT VecTy = Op->getValueType(0);
1623     EVT EltTy = VecTy.getVectorElementType();
1628     return DAG.getNode(ISD::VSELECT, DL, VecTy,
1629                        DAG.getConstant(Mask, DL, VecTy, true),
1650     EVT VecTy = Op->getValueType(0);
1651     SDValue One = DAG.getConstant(1, DL, VecTy);
1653     return DAG.getNode(ISD::XOR, DL, VecTy, Op->getOperand(1),
1654                        DAG.getNode(ISD::SHL, DL, VecTy, One,
1686     EVT VecTy = Op->getValueType(0);
1687     SDValue One = DAG.getConstant(1, DL, VecTy);
1689     return DAG.getNode(ISD::OR, DL, VecTy, Op->getOperand(1),
1690                        DAG.getNode(ISD::SHL, DL, VecTy, One,
2409   EVT VecTy = Op0->getValueType(0);
2411   if (!VecTy.is128BitVector())
2416     EVT EltTy = VecTy.getVectorElementType();