Lines Matching full:mips

9 /// This file implements the targeting of the RegisterBankInfo class for Mips.
26 namespace Mips {
71 } // end namespace Mips
81 using namespace Mips;
84 case Mips::GPR32RegClassID:
85 case Mips::CPU16Regs_and_GPRMM16ZeroRegClassID:
86 case Mips::GPRMM16MovePPairFirstRegClassID:
87 case Mips::CPU16Regs_and_GPRMM16MovePPairSecondRegClassID:
88 case Mips::GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClassID:
89 case Mips::GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID:
90 case Mips::SP32RegClassID:
91 case Mips::GP32RegClassID:
92 return getRegBank(Mips::GPRBRegBankID);
93 case Mips::FGRCCRegClassID:
94 case Mips::FGR32RegClassID:
95 case Mips::FGR64RegClassID:
96 case Mips::AFGR64RegClassID:
97 case Mips::MSA128BRegClassID:
98 case Mips::MSA128HRegClassID:
99 case Mips::MSA128WRegClassID:
100 case Mips::MSA128DRegClassID:
101 return getRegBank(Mips::FPRBRegBankID);
355 if (Bank == &Mips::FPRBRegBank)
357 else if (Bank == &Mips::GPRBRegBank)
383 return &Mips::ValueMappings[Mips::MSAIdx];
387 return Size == 32 ? &Mips::ValueMappings[Mips::SPRIdx]
388 : &Mips::ValueMappings[Mips::DPRIdx];
398 return &Mips::ValueMappings[Mips::GPRIdx];
401 return &Mips::ValueMappings[Mips::DPRIdx];
426 const ValueMapping *OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx];
465 OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx];
474 OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx];
482 {getMSAMapping(MF), &Mips::ValueMappings[Mips::GPRIdx]});
492 {getFprbMapping(Op0Size), &Mips::ValueMappings[Mips::GPRIdx]});
500 &Mips::ValueMappings[Mips::GPRIdx]});
512 getOperandsMapping({&Mips::ValueMappings[Mips::DPRIdx]});
532 {Bank, &Mips::ValueMappings[Mips::GPRIdx], Bank, Bank});
542 {Bank, &Mips::ValueMappings[Mips::GPRIdx], Bank, Bank});
566 OperandsMapping = getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx],
567 &Mips::ValueMappings[Mips::GPRIdx],
568 &Mips::ValueMappings[Mips::DPRIdx]});
578 OperandsMapping = getOperandsMapping({&Mips::ValueMappings[Mips::DPRIdx],
579 &Mips::ValueMappings[Mips::GPRIdx],
580 &Mips::ValueMappings[Mips::GPRIdx]});
601 getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr,
606 OperandsMapping = getOperandsMapping({&Mips::ValueMappings[Mips::DPRIdx],
607 &Mips::ValueMappings[Mips::SPRIdx]});
610 OperandsMapping = getOperandsMapping({&Mips::ValueMappings[Mips::SPRIdx],
611 &Mips::ValueMappings[Mips::DPRIdx]});
617 {&Mips::ValueMappings[Mips::GPRIdx], getFprbMapping(SizeFP)});
624 {getFprbMapping(Op0Size), &Mips::ValueMappings[Mips::GPRIdx]});
632 getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr});
636 getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr,
637 &Mips::ValueMappings[Mips::GPRIdx]});
641 getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr,
642 &Mips::ValueMappings[Mips::GPRIdx],
643 &Mips::ValueMappings[Mips::GPRIdx]});
689 MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));
694 MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));
738 // not be considered for regbank selection. RegBankSelect for mips