Lines Matching defs:MipsTargetLowering
100 MVT MipsTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
112 unsigned MipsTargetLowering::getNumRegistersForCallingConv(LLVMContext &Context,
121 return MipsTargetLowering::getNumRegisters(Context, VT);
124 unsigned MipsTargetLowering::getVectorTypeBreakdownForCallingConv(
139 SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const {
145 SDValue MipsTargetLowering::getTargetNode(GlobalAddressSDNode *N, EVT Ty,
151 SDValue MipsTargetLowering::getTargetNode(ExternalSymbolSDNode *N, EVT Ty,
157 SDValue MipsTargetLowering::getTargetNode(BlockAddressSDNode *N, EVT Ty,
163 SDValue MipsTargetLowering::getTargetNode(JumpTableSDNode *N, EVT Ty,
169 SDValue MipsTargetLowering::getTargetNode(ConstantPoolSDNode *N, EVT Ty,
176 const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
298 MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
539 const MipsTargetLowering *
540 MipsTargetLowering::create(const MipsTargetMachine &TM,
550 MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
569 EVT MipsTargetLowering::getSetCCResultType(const DataLayout &, LLVMContext &,
1169 SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
1199 bool MipsTargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
1203 bool MipsTargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
1207 bool MipsTargetLowering::hasBitTest(SDValue X, SDValue Y) const {
1217 bool MipsTargetLowering::shouldFoldConstantShiftPairToMask(
1231 MipsTargetLowering::ReplaceNodeResults(SDNode *N,
1237 SDValue MipsTargetLowering::
1315 MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1488 MipsTargetLowering::emitAtomicBinary(MachineInstr &MI,
1644 MachineBasicBlock *MipsTargetLowering::emitSignExtendToI32InReg(
1674 MachineBasicBlock *MipsTargetLowering::emitAtomicBinaryPartword(
1866 MipsTargetLowering::emitAtomicCmpSwap(MachineInstr &MI,
1922 MachineBasicBlock *MipsTargetLowering::emitAtomicCmpSwapPartword(
2046 SDValue MipsTargetLowering::lowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
2069 SDValue MipsTargetLowering::
2083 SDValue MipsTargetLowering::lowerSETCC(SDValue Op, SelectionDAG &DAG) const {
2097 SDValue MipsTargetLowering::lowerGlobalAddress(SDValue Op,
2144 SDValue MipsTargetLowering::lowerBlockAddress(SDValue Op,
2156 SDValue MipsTargetLowering::
2238 SDValue MipsTargetLowering::
2251 SDValue MipsTargetLowering::
2274 SDValue MipsTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {
2289 SDValue MipsTargetLowering::lowerVAARG(SDValue Op, SelectionDAG &DAG) const {
2445 MipsTargetLowering::lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
2452 SDValue MipsTargetLowering::lowerFABS32(SDValue Op, SelectionDAG &DAG,
2492 SDValue MipsTargetLowering::lowerFABS64(SDValue Op, SelectionDAG &DAG,
2516 SDValue MipsTargetLowering::lowerFABS(SDValue Op, SelectionDAG &DAG) const {
2523 SDValue MipsTargetLowering::
2541 SDValue MipsTargetLowering::lowerRETURNADDR(SDValue Op,
2568 SDValue MipsTargetLowering::lowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
2592 SDValue MipsTargetLowering::lowerATOMIC_FENCE(SDValue Op,
2602 SDValue MipsTargetLowering::lowerShiftLeftParts(SDValue Op,
2634 SDValue MipsTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,
2704 SDValue MipsTargetLowering::lowerLOAD(SDValue Op, SelectionDAG &DAG) const {
2830 SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
2843 SDValue MipsTargetLowering::lowerEH_DWARF_CFA(SDValue Op,
2854 SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
3033 CCAssignFn *MipsTargetLowering::CCAssignFnForCall() const{
3037 CCAssignFn *MipsTargetLowering::CCAssignFnForReturn() const{
3044 SDValue MipsTargetLowering::passArgOnStack(SDValue StackPtr, unsigned Offset,
3062 void MipsTargetLowering::
3120 void MipsTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
3180 MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
3519 SDValue MipsTargetLowering::LowerCallResult(
3646 SDValue MipsTargetLowering::LowerFormalArguments(
3804 MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
3813 bool MipsTargetLowering::shouldSignExtendTypeInLibCall(EVT Type,
3822 MipsTargetLowering::LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps,
3834 MipsTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
3942 MipsTargetLowering::ConstraintType
3943 MipsTargetLowering::getConstraintType(StringRef Constraint) const {
3980 MipsTargetLowering::getSingleConstraintMatchWeight(
4053 EVT MipsTargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT,
4060 std::pair<unsigned, const TargetRegisterClass *> MipsTargetLowering::
4138 MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
4211 void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
4306 bool MipsTargetLowering::isLegalAddressingMode(const DataLayout &DL,
4329 MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
4334 EVT MipsTargetLowering::getOptimalMemOpType(
4342 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
4351 unsigned MipsTargetLowering::getJumpTableEncoding() const {
4360 bool MipsTargetLowering::useSoftFloat() const {
4364 void MipsTargetLowering::copyByValRegs(
4417 void MipsTargetLowering::passByValArg(
4513 void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
4560 void MipsTargetLowering::HandleByVal(CCState *State, unsigned &Size,
4605 MachineBasicBlock *MipsTargetLowering::emitPseudoSELECT(MachineInstr &MI,
4684 MipsTargetLowering::emitPseudoD_SELECT(MachineInstr &MI,
4762 MipsTargetLowering::getRegisterByName(const char *RegName, LLT VT,
4783 MachineBasicBlock *MipsTargetLowering::emitLDR_W(MachineInstr &MI,
4829 MachineBasicBlock *MipsTargetLowering::emitLDR_D(MachineInstr &MI,
4913 MachineBasicBlock *MipsTargetLowering::emitSTR_W(MachineInstr &MI,
4963 MachineBasicBlock *MipsTargetLowering::emitSTR_D(MachineInstr &MI,