Lines Matching defs:SrcVT

183   unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
184 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
187 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
189 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
190 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
192 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
991 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
994 if (SrcVT != MVT::f32 || DestVT != MVT::f64)
1070 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
1073 if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1093 MVT DstVT, SrcVT;
1106 if (!isTypeLegal(SrcTy, SrcVT))
1109 if (SrcVT != MVT::f32 && SrcVT != MVT::f64)
1120 unsigned Opc = (SrcVT == MVT::f32) ? Mips::TRUNC_W_S : Mips::TRUNC_W_D32;
1204 MVT SrcVT = ArgVT;
1205 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1212 MVT SrcVT = ArgVT;
1213 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1776 EVT SrcVT, DestVT;
1777 SrcVT = TLI.getValueType(DL, Op->getType(), true);
1780 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
1813 MVT SrcVT = SrcEVT.getSimpleVT();
1817 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1823 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1826 switch (SrcVT.SimpleTy) {
1842 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1844 switch (SrcVT.SimpleTy) {
1857 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1862 return emitIntSExt32r2(SrcVT, SrcReg, DestVT, DestReg);
1863 return emitIntSExt32r1(SrcVT, SrcReg, DestVT, DestReg);
1866 bool MipsFastISel::emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1870 switch (SrcVT.SimpleTy) {
1888 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1890 // FastISel does not have plumbing to deal with extensions where the SrcVT or
1892 // handle (i1/i8/i16/i32 for SrcVT and i8/i16/i32/i64 for DestVT), otherwise
1895 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && (SrcVT != MVT::i16)))
1898 return emitIntZExt(SrcVT, SrcReg, DestVT, DestReg);
1899 return emitIntSExt(SrcVT, SrcReg, DestVT, DestReg);
1902 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1905 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);