Lines Matching defs:Br
130 MachineInstr *Br = nullptr;
157 int64_t computeOffset(const MachineInstr *Br);
159 void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
228 /// Iterate over list of Br's operands and search for a MachineBasicBlock
230 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) {
231 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
232 const MachineOperand &MO = Br.getOperand(I);
308 int64_t MipsBranchExpansion::computeOffset(const MachineInstr *Br) {
310 int ThisMBB = Br->getParent()->getNumber();
311 int TargetMBB = getTargetMBB(*Br)->getNumber();
336 // Replace Br with a branch which has the opposite condition code and a
338 void MipsBranchExpansion::replaceBranch(MachineBasicBlock &MBB, Iter Br,
341 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode());
344 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
346 for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
347 MachineOperand &MO = Br->getOperand(I);
356 if (!TII->isBranchWithImm(Br->getOpcode()))
368 if (Br->hasDelaySlot()) {
371 assert(Br->isBundledWithSucc());
372 MachineBasicBlock::instr_iterator II = Br.getInstrIterator();
375 Br->eraseFromParent();
414 MachineBasicBlock *MBB = I.Br->getParent(), *TgtMBB = getTargetMBB(*I.Br);
415 DebugLoc DL = I.Br->getDebugLoc();
722 if (I.Br->isUnconditionalBranch()) {
724 assert(I.Br->getDesc().getNumOperands() == 1);
725 I.Br->removeOperand(0);
726 I.Br->addOperand(MachineOperand::CreateMBB(LongBrMBB));
729 replaceBranch(*MBB, I.Br, DL, &*FallThroughMBB);
833 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End);
835 if ((Br != End) && Br->isBranch() && !Br->isIndirectBranch() &&
836 (Br->isConditionalBranch() ||
837 (Br->isUnconditionalBranch() && IsPIC))) {
838 int64_t Offset = computeOffset(&*Br);
849 !TII->isBranchOffsetInRange(Br->getOpcode(), Offset)) {
851 MBBInfos[I].Br = &*Br;
863 if (!I->Br)