Lines Matching defs:IDLoc

140     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
175 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
180   TmpInst.setLoc(IDLoc);
185                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
190   TmpInst.setLoc(IDLoc);
195                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
196   emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI);
200                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
201   emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI);
205                                 SMLoc IDLoc, const MCSubtargetInfo *STI) {
210   TmpInst.setLoc(IDLoc);
215                                  MCOperand Op2, SMLoc IDLoc,
222   TmpInst.setLoc(IDLoc);
227                                  unsigned Reg2, SMLoc IDLoc,
229   emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
233                                   unsigned Reg2, MCOperand Op3, SMLoc IDLoc,
241   TmpInst.setLoc(IDLoc);
246                                  int16_t Imm, SMLoc IDLoc,
248   emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
253                                    int16_t Imm2, SMLoc IDLoc,
262   TmpInst.setLoc(IDLoc);
274                                   int16_t ShiftAmount, SMLoc IDLoc,
277     emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
281   emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
284 void MipsTargetStreamer::emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc,
290     emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);
297   emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
300 void MipsTargetStreamer::emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI) {
302     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
304     emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
308 void MipsTargetStreamer::emitGPRestore(int Offset, SMLoc IDLoc,
310   emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
316     function_ref<unsigned()> GetATReg, SMLoc IDLoc,
319     emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
340   emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
342     emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
344   emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
353                                                unsigned TmpReg, SMLoc IDLoc,
356     emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);
376   emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
378     emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
380   emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);
699     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
701   MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
1214     int Offset, function_ref<unsigned()> GetATReg, SMLoc IDLoc,
1216   MipsTargetStreamer::emitDirectiveCpRestore(Offset, GetATReg, IDLoc, STI);
1229   emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc,