Lines Matching full:const
31 const MCInstrInfo &MCII;
35 bool isMicroMips(const MCSubtargetInfo &STI) const;
36 bool isMips32r6(const MCSubtargetInfo &STI) const;
39 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle) in MipsMCCodeEmitter()
41 MipsMCCodeEmitter(const MipsMCCodeEmitter &) = delete;
42 MipsMCCodeEmitter &operator=(const MipsMCCodeEmitter &) = delete;
45 void EmitByte(unsigned char C, raw_ostream &OS) const;
47 void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
49 const MCSubtargetInfo &STI) const override;
53 uint64_t getBinaryCodeForInstr(const MCInst &MI,
55 const MCSubtargetInfo &STI) const;
60 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
62 const MCSubtargetInfo &STI) const;
67 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
69 const MCSubtargetInfo &STI) const;
73 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
75 const MCSubtargetInfo &STI) const;
77 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
79 const MCSubtargetInfo &STI) const;
81 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
83 const MCSubtargetInfo &STI) const;
87 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
89 const MCSubtargetInfo &STI) const;
94 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
96 const MCSubtargetInfo &STI) const;
101 unsigned getBranchTargetOpValue1SImm16(const MCInst &MI, unsigned OpNo,
103 const MCSubtargetInfo &STI) const;
108 unsigned getBranchTargetOpValueMMR6(const MCInst &MI, unsigned OpNo,
110 const MCSubtargetInfo &STI) const;
115 unsigned getBranchTargetOpValueLsl2MMR6(const MCInst &MI, unsigned OpNo,
117 const MCSubtargetInfo &STI) const;
122 unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo,
124 const MCSubtargetInfo &STI) const;
129 unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo,
131 const MCSubtargetInfo &STI) const;
136 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
138 const MCSubtargetInfo &STI) const;
143 unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
145 const MCSubtargetInfo &STI) const;
150 unsigned getBranchTarget21OpValueMM(const MCInst &MI, unsigned OpNo,
152 const MCSubtargetInfo &STI) const;
157 unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
159 const MCSubtargetInfo &STI) const;
164 unsigned getBranchTarget26OpValueMM(const MCInst &MI, unsigned OpNo,
166 const MCSubtargetInfo &STI) const;
171 unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
173 const MCSubtargetInfo &STI) const;
177 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
179 const MCSubtargetInfo &STI) const;
181 unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
183 const MCSubtargetInfo &STI) const;
186 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
188 const MCSubtargetInfo &STI) const;
189 unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo,
191 const MCSubtargetInfo &STI) const;
192 unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo,
194 const MCSubtargetInfo &STI) const;
195 unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo,
197 const MCSubtargetInfo &STI) const;
198 unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo,
200 const MCSubtargetInfo &STI) const;
201 unsigned getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo,
203 const MCSubtargetInfo &STI) const;
204 unsigned getMemEncodingMMImm9(const MCInst &MI, unsigned OpNo,
206 const MCSubtargetInfo &STI) const;
207 unsigned getMemEncodingMMImm11(const MCInst &MI, unsigned OpNo,
209 const MCSubtargetInfo &STI) const;
210 unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
212 const MCSubtargetInfo &STI) const;
213 unsigned getMemEncodingMMImm16(const MCInst &MI, unsigned OpNo,
215 const MCSubtargetInfo &STI) const;
216 unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo,
218 const MCSubtargetInfo &STI) const;
219 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
221 const MCSubtargetInfo &STI) const;
225 unsigned getUImmWithOffsetEncoding(const MCInst &MI, unsigned OpNo,
227 const MCSubtargetInfo &STI) const;
229 unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
231 const MCSubtargetInfo &STI) const;
233 unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
235 const MCSubtargetInfo &STI) const;
237 unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
239 const MCSubtargetInfo &STI) const;
240 unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo,
242 const MCSubtargetInfo &STI) const;
244 unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo,
246 const MCSubtargetInfo &STI) const;
247 unsigned getMovePRegSingleOpValue(const MCInst &MI, unsigned OpNo,
249 const MCSubtargetInfo &STI) const;
251 unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo,
253 const MCSubtargetInfo &STI) const;
255 unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
256 const MCSubtargetInfo &STI) const;
258 unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
260 const MCSubtargetInfo &STI) const;
262 unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
264 const MCSubtargetInfo &STI) const;
267 void LowerCompactBranch(MCInst& Inst) const;