Lines Matching full:loongarch
1 //=- LoongArchMCCodeEmitter.cpp - Convert LoongArch code to machine code --===//
129 bool EnableRelax = STI.hasFeature(LoongArch::FeatureRelax);
132 LoongArch::Fixups FixupKind = LoongArch::fixup_loongarch_invalid;
145 FixupKind = LoongArch::fixup_loongarch_b16;
148 FixupKind = LoongArch::fixup_loongarch_b21;
153 FixupKind = LoongArch::fixup_loongarch_b26;
156 FixupKind = LoongArch::fixup_loongarch_abs_hi20;
159 FixupKind = LoongArch::fixup_loongarch_abs_lo12;
162 FixupKind = LoongArch::fixup_loongarch_abs64_lo20;
165 FixupKind = LoongArch::fixup_loongarch_abs64_hi12;
168 FixupKind = LoongArch::fixup_loongarch_pcala_hi20;
171 FixupKind = LoongArch::fixup_loongarch_pcala_lo12;
174 FixupKind = LoongArch::fixup_loongarch_pcala64_lo20;
177 FixupKind = LoongArch::fixup_loongarch_pcala64_hi12;
180 FixupKind = LoongArch::fixup_loongarch_got_pc_hi20;
183 FixupKind = LoongArch::fixup_loongarch_got_pc_lo12;
186 FixupKind = LoongArch::fixup_loongarch_got64_pc_lo20;
189 FixupKind = LoongArch::fixup_loongarch_got64_pc_hi12;
192 FixupKind = LoongArch::fixup_loongarch_got_hi20;
195 FixupKind = LoongArch::fixup_loongarch_got_lo12;
198 FixupKind = LoongArch::fixup_loongarch_got64_lo20;
201 FixupKind = LoongArch::fixup_loongarch_got64_hi12;
204 FixupKind = LoongArch::fixup_loongarch_tls_le_hi20;
207 FixupKind = LoongArch::fixup_loongarch_tls_le_lo12;
210 FixupKind = LoongArch::fixup_loongarch_tls_le64_lo20;
213 FixupKind = LoongArch::fixup_loongarch_tls_le64_hi12;
216 FixupKind = LoongArch::fixup_loongarch_tls_ie_pc_hi20;
219 FixupKind = LoongArch::fixup_loongarch_tls_ie_pc_lo12;
222 FixupKind = LoongArch::fixup_loongarch_tls_ie64_pc_lo20;
225 FixupKind = LoongArch::fixup_loongarch_tls_ie64_pc_hi12;
228 FixupKind = LoongArch::fixup_loongarch_tls_ie_hi20;
231 FixupKind = LoongArch::fixup_loongarch_tls_ie_lo12;
234 FixupKind = LoongArch::fixup_loongarch_tls_ie64_lo20;
237 FixupKind = LoongArch::fixup_loongarch_tls_ie64_hi12;
240 FixupKind = LoongArch::fixup_loongarch_tls_ld_pc_hi20;
243 FixupKind = LoongArch::fixup_loongarch_tls_ld_hi20;
246 FixupKind = LoongArch::fixup_loongarch_tls_gd_pc_hi20;
249 FixupKind = LoongArch::fixup_loongarch_tls_gd_hi20;
252 FixupKind = LoongArch::fixup_loongarch_call36;
255 FixupKind = LoongArch::fixup_loongarch_tls_desc_pc_hi20;
258 FixupKind = LoongArch::fixup_loongarch_tls_desc_pc_lo12;
261 FixupKind = LoongArch::fixup_loongarch_tls_desc64_pc_lo20;
264 FixupKind = LoongArch::fixup_loongarch_tls_desc64_pc_hi12;
267 FixupKind = LoongArch::fixup_loongarch_tls_desc_hi20;
270 FixupKind = LoongArch::fixup_loongarch_tls_desc_lo12;
273 FixupKind = LoongArch::fixup_loongarch_tls_desc64_lo20;
276 FixupKind = LoongArch::fixup_loongarch_tls_desc64_hi12;
279 FixupKind = LoongArch::fixup_loongarch_tls_desc_ld;
282 FixupKind = LoongArch::fixup_loongarch_tls_desc_call;
285 FixupKind = LoongArch::fixup_loongarch_tls_le_hi20_r;
288 FixupKind = LoongArch::fixup_loongarch_tls_le_lo12_r;
291 FixupKind = LoongArch::fixup_loongarch_pcrel20_s2;
294 FixupKind = LoongArch::fixup_loongarch_tls_ld_pcrel20_s2;
297 FixupKind = LoongArch::fixup_loongarch_tls_gd_pcrel20_s2;
300 FixupKind = LoongArch::fixup_loongarch_tls_desc_pcrel20_s2;
309 case LoongArch::BEQ:
310 case LoongArch::BNE:
311 case LoongArch::BLT:
312 case LoongArch::BGE:
313 case LoongArch::BLTU:
314 case LoongArch::BGEU:
315 FixupKind = LoongArch::fixup_loongarch_b16;
317 case LoongArch::BEQZ:
318 case LoongArch::BNEZ:
319 case LoongArch::BCEQZ:
320 case LoongArch::BCNEZ:
321 FixupKind = LoongArch::fixup_loongarch_b21;
323 case LoongArch::B:
324 case LoongArch::BL:
325 FixupKind = LoongArch::fixup_loongarch_b26;
330 assert(FixupKind != LoongArch::fixup_loongarch_invalid &&
341 0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_relax), MI.getLoc()));
353 case LoongArch::PseudoVREPLI_B:
354 case LoongArch::PseudoXVREPLI_B:
356 case LoongArch::PseudoVREPLI_H:
357 case LoongArch::PseudoXVREPLI_H:
360 case LoongArch::PseudoVREPLI_W:
361 case LoongArch::PseudoXVREPLI_W:
364 case LoongArch::PseudoVREPLI_D:
365 case LoongArch::PseudoXVREPLI_D:
393 0, Expr, MCFixupKind(LoongArch::fixup_loongarch_tls_le_add_r),
397 unsigned ADD = MI.getOpcode() == LoongArch::PseudoAddTPRel_D
398 ? LoongArch::ADD_D
399 : LoongArch::ADD_W;
416 case LoongArch::PseudoVREPLI_B:
417 case LoongArch::PseudoVREPLI_H:
418 case LoongArch::PseudoVREPLI_W:
419 case LoongArch::PseudoVREPLI_D:
420 return expandToVectorLDI<LoongArch::VLDI>(MI, CB, Fixups, STI);
421 case LoongArch::PseudoXVREPLI_B:
422 case LoongArch::PseudoXVREPLI_H:
423 case LoongArch::PseudoXVREPLI_W:
424 case LoongArch::PseudoXVREPLI_D:
425 return expandToVectorLDI<LoongArch::XVLDI>(MI, CB, Fixups, STI);
426 case LoongArch::PseudoAddTPRel_W:
427 case LoongArch::PseudoAddTPRel_D: