Lines Matching +full:hi +full:- +full:fi
1 //=- LoongArchInstrInfo.cpp - LoongArch Instruction Information -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
50 // VR->VR copies.
58 // XR->XR copies.
66 // GPR->CFR copy.
73 // CFR->GPR copy.
80 // CFR->CFR copy.
87 // FPR->FPR copies.
95 // FPR32 -> GPR copies
99 // FPR64 -> GPR copies
103 llvm_unreachable("Impossible reg-to-reg copy");
112 bool IsKill, int FI, const TargetRegisterClass *RC,
115 MachineFrameInfo &MFI = MF->getFrameInfo();
119 Opcode = TRI->getRegSizeInBits(LoongArch::GPRRegClass) == 32
135 MachineMemOperand *MMO = MF->getMachineMemOperand(
136 MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore,
137 MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
141 .addFrameIndex(FI)
148 Register DstReg, int FI,
153 MachineFrameInfo &MFI = MF->getFrameInfo();
157 Opcode = TRI->getRegSizeInBits(LoongArch::GPRRegClass) == 32
173 MachineMemOperand *MMO = MF->getMachineMemOperand(
174 MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad,
175 MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
178 .addFrameIndex(FI)
190 report_fatal_error("Should only materialize 32-bit constants for LA32");
225 const MachineFunction *MF = MI.getParent()->getParent();
226 const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo();
251 return MI.getOperand(MI.getNumExplicitOperands() - 1).getMBB();
256 // Block ends with fall-through condbranch.
260 Target = LastInst.getOperand(NumOp - 1).getMBB();
263 for (int i = 0; i < NumOp - 1; i++)
287 if (J->getDesc().isUnconditionalBranch() ||
288 J->getDesc().isIndirectBranch()) {
297 std::next(FirstUncondOrIndirectBr)->eraseFromParent();
298 NumTerminators--;
304 if (NumTerminators == 1 && I->getDesc().isUnconditionalBranch()) {
310 if (NumTerminators == 1 && I->getDesc().isConditionalBranch()) {
316 if (NumTerminators == 2 && std::prev(I)->getDesc().isConditionalBranch() &&
317 I->getDesc().isUnconditionalBranch()) {
358 if (!I->getDesc().isBranch())
364 I->eraseFromParent();
370 --I;
371 if (!I->getDesc().isConditionalBranch())
377 I->eraseFromParent();
402 // Either a one or two-way conditional branch.
410 // One-way conditional branch.
414 // Two-way conditional branch.
433 MachineRegisterInfo &MRI = MF->getRegInfo();
434 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
436 MF->getInfo<LoongArchMachineFunctionInfo>();
440 "Branch offsets outside of the signed 32-bit range not supported");
458 RS->enterBasicBlockEnd(MBB);
459 Register Scav = RS->scavengeRegisterBackwards(
463 RS->setRegUsed(Scav);
468 int FrameIndex = LAFI->getBranchRelaxationSpillFrameIndex();
469 if (FrameIndex == -1)
473 TRI->eliminateFrameIndex(std::prev(PCALAU12I.getIterator()),
479 TRI->eliminateFrameIndex(RestoreBB.back(),
530 {MO_CALL, "loongarch-call"},
531 {MO_CALL_PLT, "loongarch-call-plt"},
532 {MO_PCREL_HI, "loongarch-pcrel-hi"},
533 {MO_PCREL_LO, "loongarch-pcrel-lo"},
534 {MO_PCREL64_LO, "loongarch-pcrel64-lo"},
535 {MO_PCREL64_HI, "loongarch-pcrel64-hi"},
536 {MO_GOT_PC_HI, "loongarch-got-pc-hi"},
537 {MO_GOT_PC_LO, "loongarch-got-pc-lo"},
538 {MO_GOT_PC64_LO, "loongarch-got-pc64-lo"},
539 {MO_GOT_PC64_HI, "loongarch-got-pc64-hi"},
540 {MO_LE_HI, "loongarch-le-hi"},
541 {MO_LE_LO, "loongarch-le-lo"},
542 {MO_LE64_LO, "loongarch-le64-lo"},
543 {MO_LE64_HI, "loongarch-le64-hi"},
544 {MO_IE_PC_HI, "loongarch-ie-pc-hi"},
545 {MO_IE_PC_LO, "loongarch-ie-pc-lo"},
546 {MO_IE_PC64_LO, "loongarch-ie-pc64-lo"},
547 {MO_IE_PC64_HI, "loongarch-ie-pc64-hi"},
548 {MO_DESC_PC_HI, "loongarch-desc-pc-hi"},
549 {MO_DESC_PC_LO, "loongarch-desc-pc-lo"},
550 {MO_DESC64_PC_LO, "loongarch-desc64-pc-lo"},
551 {MO_DESC64_PC_HI, "loongarch-desc64-pc-hi"},
552 {MO_DESC_LD, "loongarch-desc-ld"},
553 {MO_DESC_CALL, "loongarch-desc-call"},
554 {MO_LD_PC_HI, "loongarch-ld-pc-hi"},
555 {MO_GD_PC_HI, "loongarch-gd-pc-hi"}};