Lines Matching defs:TmpR1

1818   //   TmpR1 = V6_vandqrt Qx, TmpR0
1819   //   store FI, 0, TmpR1
1821   Register TmpR1 = MRI.createVirtualRegister(RC);
1826   BuildMI(B, It, DL, HII.get(Hexagon::V6_vandqrt), TmpR1)
1831   HII.storeRegToStackSlot(B, It, TmpR1, true, FI, RC, HRI, Register());
1835   NewRegs.push_back(TmpR1);
1853   // TmpR1 = load FI, 0
1854   // DstR = V6_vandvrt TmpR1, TmpR0
1856   Register TmpR1 = MRI.createVirtualRegister(RC);
1862   HII.loadRegFromStackSlot(B, It, TmpR1, FI, RC, HRI, Register());
1866     .addReg(TmpR1, RegState::Kill)
1870   NewRegs.push_back(TmpR1);