Lines Matching defs:HexagonExpandCondsets
1 //===- HexagonExpandCondsets.cpp ------------------------------------------===//
140 class HexagonExpandCondsets : public MachineFunctionPass {
144 HexagonExpandCondsets() : MachineFunctionPass(ID) {
247 char HexagonExpandCondsets::ID = 0;
251 char &HexagonExpandCondsetsID = HexagonExpandCondsets::ID;
255 INITIALIZE_PASS_BEGIN(HexagonExpandCondsets, "expand-condsets",
260 INITIALIZE_PASS_END(HexagonExpandCondsets, "expand-condsets",
263 unsigned HexagonExpandCondsets::getMaskForSub(unsigned Sub) {
277 bool HexagonExpandCondsets::isCondset(const MachineInstr &MI) {
291 LaneBitmask HexagonExpandCondsets::getLaneMask(Register Reg, unsigned Sub) {
297 void HexagonExpandCondsets::addRefToMap(RegisterRef RR, ReferenceMap &Map,
307 bool HexagonExpandCondsets::isRefInMap(RegisterRef RR, ReferenceMap &Map,
318 void HexagonExpandCondsets::updateKillFlags(Register Reg) {
369 void HexagonExpandCondsets::updateDeadsInRange(Register Reg, LaneBitmask LM,
529 void HexagonExpandCondsets::updateDeadFlags(Register Reg) {
543 void HexagonExpandCondsets::recalculateLiveInterval(Register Reg) {
548 void HexagonExpandCondsets::removeInstr(MachineInstr &MI) {
553 void HexagonExpandCondsets::updateLiveness(const std::set<Register> &RegSet,
579 void HexagonExpandCondsets::distributeLiveIntervals(
602 unsigned HexagonExpandCondsets::getCondTfrOpcode(const MachineOperand &SO,
644 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp,
684 bool HexagonExpandCondsets::split(MachineInstr &MI,
744 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) {
768 MachineInstr *HexagonExpandCondsets::getReachingDefForPred(RegisterRef RD,
818 bool HexagonExpandCondsets::canMoveOver(MachineInstr &MI, ReferenceMap &Defs,
844 bool HexagonExpandCondsets::canMoveMemTo(MachineInstr &TheI, MachineInstr &ToI,
877 void HexagonExpandCondsets::predicateAt(const MachineOperand &DefOp,
932 void HexagonExpandCondsets::renameInRange(RegisterRef RO, RegisterRef RN,
959 bool HexagonExpandCondsets::predicate(MachineInstr &TfrI, bool Cond,
1094 bool HexagonExpandCondsets::predicateInBlock(MachineBasicBlock &B,
1118 bool HexagonExpandCondsets::isIntReg(RegisterRef RR, unsigned &BW) {
1133 bool HexagonExpandCondsets::isIntraBlocks(LiveInterval &LI) {
1145 bool HexagonExpandCondsets::coalesceRegisters(RegisterRef R1, RegisterRef R2) {
1212 bool HexagonExpandCondsets::coalesceSegments(
1274 bool HexagonExpandCondsets::runOnMachineFunction(MachineFunction &MF) {
1360 return new HexagonExpandCondsets();