Lines Matching +full:10 +full:- +full:bits
1 //===- CSKYInstrFormats16Instr.td - 16-bit Instr. Formats -*- tablegen --*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 class J16<bits<5> sop, string opstr, dag ins>
12 bits<10> offset;
14 let Inst{14 - 10} = sop;
15 let Inst{9 - 0} = offset;
18 class J16_B<bits<5> sop, string opstr>
21 bits<10> offset;
23 let Inst{14 - 10} = sop;
24 let Inst{9 - 0} = offset;
27 class R16_XYZ<bits<2> sop, string opstr, SDNode opnode> : CSKY16Inst<AddrModeNone,
30 bits<3> rz;
31 bits<3> rx;
32 bits<3> ry;
33 let Inst{15 - 11} = 0b01011;
34 let Inst{10 - 8} = rx;
35 let Inst{7 - 5} = rz;
36 let Inst{4 - 2} = ry;
40 class R16_XZ_BINOP<bits<4> op, bits<2> sop, string opstr, PatFrag opnode> : CSKY16Inst<
43 bits<4> rz;
44 bits<4> rx;
46 let Inst{13 - 10} = op;
47 let Inst{9 - 6} = rz;
48 let Inst{5 - 2} = rx;
53 class R16_XZ_BINOP_NOPat<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
56 bits<4> rz;
57 bits<4> rx;
59 let Inst{13 - 10} = op;
60 let Inst{9 - 6} = rz;
61 let Inst{5 - 2} = rx;
66 class R16_XZ_BINOP_C<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
69 bits<4> rz;
70 bits<4> rx;
72 let Inst{13 - 10} = op;
73 let Inst{9 - 6} = rz;
74 let Inst{5 - 2} = rx;
79 class R16_XZ_UNOP<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
82 bits<4> rz;
83 bits<4> rx;
85 let Inst{13 - 10} = op;
86 let Inst{9 - 6} = rz;
87 let Inst{5 - 2} = rx;
91 class R16_Z_UNOP<bits<4> op, bits<2> sop, string opstr> : CSKY16Inst<
94 bits<4> rz;
95 bits<4> rx;
97 let Inst{13 - 10} = op;
98 let Inst{9 - 6} = rz;
99 let Inst{5 - 2} = rx;
104 class R16_XY_CMP<bits<2> sop, string opstr> : CSKY16Inst<
107 bits<4> ry;
108 bits<4> rx;
110 let Inst{13 - 10} = 0b1001;
111 let Inst{9 - 6} = ry;
112 let Inst{5 - 2} = rx;
117 class R16_X_J<bits<8> op_rz, bits<2> sop, string opstr> : CSKY16Inst<
119 bits<4> rx;
121 let Inst{13 - 6} = op_rz;
122 let Inst{5 - 2} = rx;
126 class I16_Z_8<bits<3> op, dag ins, string asmstr>
128 bits<3> rz;
129 bits<8> imm8;
131 let Inst{13 - 11} = op;
132 let Inst{10 - 8} = rz;
133 let Inst{7 - 0} = imm8;
136 class I16_Z_5<bits<3> sop, dag outs, dag ins,string opstr>
139 bits<3> rz;
140 bits<5> imm5;
142 let Inst{13 - 11} = 0b111;
143 let Inst{10 - 8} = rz;
144 let Inst{7 - 5} = sop;
145 let Inst{4 - 0} = imm5;
148 class I16_X_CMP<bits<3> sop, string opstr, Operand Immoperand> : CSKY16Inst<
151 bits<3> rx;
152 bits<5> imm5;
154 let Inst{13 - 11} = 0b111;
155 let Inst{10 - 8} = rx;
156 let Inst{7 - 5} = sop;
157 let Inst{4 - 0} = imm5;
161 class I16_SP_IMM7<bits<3> sop, string opstr> : CSKY16Inst<
164 bits<7> imm7;
166 let Inst{13 - 10} = 0b0101;
168 let Inst{7 - 5} = sop;
169 let Inst{4 - 0} = imm7{4 - 0};
172 class I16_XZ_IMM5<bits<3> sop, string opstr, SDNode opnode> : CSKY16Inst<
175 bits<3> rx;
176 bits<3> rz;
177 bits<5> imm5;
179 let Inst{13 - 11} = sop;
180 let Inst{10 - 8} = rx;
181 let Inst{7 - 5} = rz;
182 let Inst{4 - 0} = imm5;
185 class I16_XZ_LDST<AddrMode am, bits<3> sop, string opstr, dag outs, dag ins>
188 bits<3> rx;
189 bits<3> rz;
190 bits<5> imm;
192 let Inst{13 - 11} = sop;
193 let Inst{10 - 8} = rx;
194 let Inst{7 - 5} = rz;
195 let Inst{4 - 0} = imm;
198 class I16_ZSP_LDST<AddrMode am, bits<3> sop, string opstr, dag outs, dag ins> : CSKY16Inst<
201 bits<3> rz;
202 bits<8> addr;
204 let Inst{13 - 11} = sop;
205 let Inst{10 - 8} = addr{7 - 5};
206 let Inst{7 - 5} = rz;
207 let Inst{4 - 0} = addr{4 - 0};
210 class I16_XZ_IMM3<bits<2> sop, string opstr, SDNode opnode> : CSKY16Inst<
213 bits<3> rx;
214 bits<3> rz;
215 bits<3> oimm3;
217 let Inst{13 - 11} = 0b011;
218 let Inst{10 - 8} = rx;
219 let Inst{7 - 5} = rz;
220 let Inst{4 - 2} = oimm3;
224 class I16_BPushPop<bits<11> op, bits<2> uop, dag out, dag ins, string opstr> :
226 bits<3> rz;
227 let Inst{15- 5} = op;
228 let Inst{4 -2} = rz;