Lines Matching defs:VA
200 const CCValAssign &VA, const SDLoc &DL) {
201 EVT LocVT = VA.getLocVT();
203 switch (VA.getLocInfo()) {
216 const CCValAssign &VA, const SDLoc &DL) {
217 switch (VA.getLocInfo()) {
223 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val);
231 const CCValAssign &VA, const SDLoc &DL) {
234 EVT LocVT = VA.getLocVT();
255 RegInfo.addLiveIn(VA.getLocReg(), VReg);
258 return convertLocVTToValVT(DAG, Val, VA, DL);
262 const CCValAssign &VA, const SDLoc &DL) {
265 EVT LocVT = VA.getLocVT();
266 EVT ValVT = VA.getValVT();
269 VA.getLocMemOffset(), /*Immutable=*/true);
274 switch (VA.getLocInfo()) {
288 static SDValue unpack64(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA,
290 assert(VA.getLocVT() == MVT::i32 &&
291 (VA.getValVT() == MVT::f64 || VA.getValVT() == MVT::i64) &&
292 "Unexpected VA");
297 if (VA.isMemLoc()) {
299 int FI = MFI.CreateFixedObject(8, VA.getLocMemOffset(), /*Immutable=*/true);
301 return DAG.getLoad(VA.getValVT(), DL, Chain, FIN,
305 assert(VA.isRegLoc() && "Expected register VA assignment");
308 RegInfo.addLiveIn(VA.getLocReg(), LoVReg);
311 if (VA.getLocReg() == CSKY::R3) {
320 RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg);
323 return DAG.getNode(CSKYISD::BITCAST_FROM_LOHI, DL, VA.getValVT(), Lo, Hi);
352 CCValAssign &VA = ArgLocs[i];
355 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;
358 ArgValue = unpack64(DAG, Chain, VA, DL);
359 else if (VA.isRegLoc())
360 ArgValue = unpackFromRegLoc(Subtarget, DAG, Chain, VA, DL);
362 ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL);
455 CCValAssign &VA = CSKYLocs[i];
456 assert(VA.isRegLoc() && "Can only return in registers!");
458 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;
462 assert(VA.isRegLoc() && "Expected return via registers");
468 Register RegLo = VA.getLocReg();
480 Val = convertValVTToLocVT(DAG, Val, VA, DL);
481 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);
485 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
572 CCValAssign &VA = ArgLocs[i];
576 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;
578 if (IsF64OnCSKY && VA.isRegLoc()) {
585 Register RegLo = VA.getLocReg();
605 ArgValue = convertValVTToLocVT(DAG, ArgValue, VA, DL);
611 if (VA.isRegLoc()) {
613 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
615 assert(VA.isMemLoc() && "Argument not register or memory");
624 DAG.getIntPtrConstant(VA.getLocMemOffset(), DL));
721 for (auto &VA : CSKYLocs) {
724 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue);
729 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64;
732 assert(VA.getLocReg() == GPRArgRegs[0] && "Unexpected reg assignment");
737 RetValue = DAG.getNode(CSKYISD::BITCAST_FROM_LOHI, DL, VA.getValVT(),
741 RetValue = convertLocVTToValVT(DAG, RetValue, VA, DL);