Lines Matching defs:PredReg

74   Register PredReg;
75   ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);
122   Register PredReg;
123   return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL;
313                                   ARMCC::CondCodes Pred, Register PredReg,
319       .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
336         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
343         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
352             .add(predOps(Pred, PredReg))
364             .add(predOps(Pred, PredReg))
573     Register PredReg;
574     if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&
787                                            Register &PredReg) {
791   return getInstrPredicate(MI, PredReg);
805                                             Register &PredReg) {
808     PredReg = 0;
812   PredReg = MI.getOperand(PIdx+1).getReg();