Lines Matching +full:hi +full:- +full:fi

1 //===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11 //===----------------------------------------------------------------------===//
65       // The pre-decrement is on purpose here.
67       UsedRegs.stepBackward(*--InstUpToI);
72           ->addRegisterDead(ARM::CPSR, RegInfo);
78     BitVector Allocatable = RegInfo->getAllocatableSet(
79         MF, RegInfo->getRegClass(ARM::hGPRRegClassID));
116                                           Register SrcReg, bool isKill, int FI,
127     if (I != MBB.end()) DL = I->getDebugLoc();
132         MachinePointerInfo::getFixedStack(MF, FI), MachineMemOperand::MOStore,
133         MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
136         .addFrameIndex(FI)
145                                            Register DestReg, int FI,
149   assert((RC->hasSuperClassEq(&ARM::tGPRRegClass) ||
153   if (RC->hasSuperClassEq(&ARM::tGPRRegClass) ||
156     if (I != MBB.end()) DL = I->getDebugLoc();
161         MachinePointerInfo::getFixedStack(MF, FI), MachineMemOperand::MOLoad,
162         MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
164         .addFrameIndex(FI)
173   MachineFunction &MF = *MI->getParent()->getParent();
175   const auto *GV = cast<GlobalValue>((*MI->memoperands_begin())->getValue());
177   assert(MF.getFunction().getParent()->getStackProtectorGuard() != "tls" &&
181   if (!GV->isDSOLocal())
193   // In Thumb1 the scheduler may need to schedule a cross-copy between GPRS and CPSR
196   // FIXME. Actually implement the cross-copy where it is possible (post v6)
198   unsigned Opcode = N->getMachineOpcode();