Lines Matching defs:TII
68 const TargetInstrInfo &TII, const DebugLoc &dl,
84 BuildMI(MBB, MBBI, dl, TII.get(XOInstr), ScratchReg)
90 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDhirr), ARM::SP)
99 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
106 const TargetInstrInfo &TII, const DebugLoc &dl,
109 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
117 const Thumb1InstrInfo &TII =
127 unsigned Amount = TII.getFrameSize(Old);
137 emitCallSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
140 emitCallSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
155 const Thumb1InstrInfo &TII =
182 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize,
187 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
194 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo,
200 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
315 BuildMI(MBB, AfterPush, dl, TII.get(ARM::tMOVr), FramePtr)
322 BuildMI(MBB, AfterPush, dl, TII.get(ARM::tADDrSPi), FramePtr)
332 BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
339 BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
355 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
382 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
404 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
429 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
435 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
457 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
461 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSRri), ARM::R4)
467 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSLri), ARM::R4)
473 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
485 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
508 const Thumb1InstrInfo &TII =
519 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo,
560 TII, *RegInfo, MachineInstr::FrameDestroy);
561 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
566 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
575 emitPrologueEpilogueSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes,
578 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes,
637 const TargetInstrInfo &TII = *STI.getInstrInfo();
670 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP_RET))
751 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRspi))
758 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr))
766 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo,
775 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr))
786 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP))
802 MBBI = BuildMI(MBB, MBB.end(), dl, TII.get(ARM::tBX_RET))
808 BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP))
813 emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo, ArgRegsSaveSize,
816 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr))
823 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr))
863 const TargetInstrInfo &TII,
876 BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH)).add(predOps(ARMCC::AL));
911 MachineInstrBuilder PushMIB = BuildMI(MF, DL, TII.get(ARM::tPUSH))
924 BuildMI(MBB, MI, DL, TII.get(ARM::tMOVr))
953 const TargetInstrInfo &TII,
984 BuildMI(MBB, MI, DL, TII.get(ARM::tMOVr))
1000 MachineInstrBuilder PopMIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPOP))
1010 BuildMI(MBB, MI, DL, TII.get(ARM::tMOVr))
1027 BuildMI(MBB, MI, DL, TII.get(ARM::tMOVr))
1036 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP))
1069 (*MIB).setDesc(TII.get(ARM::tPOP_RET));
1092 const TargetInstrInfo &TII = *STI.getInstrInfo();
1112 pushRegsToStack(MBB, MI, TII, FrameRecord, {ARM::LR});
1126 pushRegsToStack(MBB, MI, TII, SpilledGPRs, CopyRegs);
1139 const TargetInstrInfo &TII = *STI.getInstrInfo();
1184 popRegsFromStack(MBB, MI, TII, SpilledGPRs, CopyRegs, IsVarArg,
1194 popRegsFromStack(MBB, MI, TII, FrameRecord, UnusedReturnRegs, IsVarArg,