Lines Matching defs:Instr

76                                             MachineInstr &Instr,
574 static ARMCC::CondCodes GetCondCode(MachineInstr &Instr) {
575   assert(IsVCMP(Instr.getOpcode()) && "Inst must be a VCMP");
576   return ARMCC::CondCodes(Instr.getOperand(3).getImm());
606 // Returns true if Instr writes to VCCR.
607 static bool IsWritingToVCCR(MachineInstr &Instr) {
608   if (Instr.getNumOperands() == 0)
610   MachineOperand &Dst = Instr.getOperand(0);
616   MachineRegisterInfo &RegInfo = Instr.getMF()->getRegInfo();
622 //    <Instr that uses %A ('User' Operand)>
625 //    <Instr that uses %K ('User' Operand)>
630     MachineBasicBlock &MBB, MachineInstr &Instr, MachineOperand &User,
635       BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT))
858   for (MachineInstr &Instr : MBB.instrs()) {
861               Instr.findRegisterUseOperand(PrevVCMP->getOperand(0).getReg(),
870     if (getVPTInstrPredicate(Instr) != ARMVCC::None)
874     if (!IsVCMP(Instr.getOpcode())) {
876       if (IsWritingToVCCR(Instr))
881     if (!PrevVCMP || !IsVPNOTEquivalent(Instr, *PrevVCMP)) {
882       PrevVCMP = &Instr;
892         BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT))
893             .add(Instr.getOperand(0))
898                Instr.dump());
907     DeadInstructions.push_back(&Instr);
929   for (MachineInstr &Instr : MBB.instrs()) {
931     int PIdx = llvm::findFirstVPTPredOperandIdx(Instr);
934     Register VPR = Instr.getOperand(PIdx + 1).getReg();
965       Instr.getOperand(PIdx + 1).setReg(LastVPTReg);
971       LLVM_DEBUG(dbgs() << "Reusing predicate: in  " << Instr);
977       auto VPNot = BuildMI(MBB, &Instr, Instr.getDebugLoc(),
983       Instr.getOperand(PIdx + 1).setReg(NewVPR);
990                         << Instr);