Lines Matching defs:Imm
98 inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) {
99 return ShOp | (Imm << 3);
106 inline unsigned getSOImmValImm(unsigned Imm) { return Imm & 0xFF; }
109 inline unsigned getSOImmValRot(unsigned Imm) { return (Imm >> 8) * 2; }
111 /// getSOImmValRotate - Try to handle Imm with an immediate shifter operand,
115 inline unsigned getSOImmValRotate(unsigned Imm) {
118 if ((Imm & ~255U) == 0) return 0;
121 unsigned TZ = llvm::countr_zero(Imm);
128 if ((llvm::rotr<uint32_t>(Imm, RotAmt) & ~255U) == 0)
133 if (Imm & 63U) {
134 unsigned TZ2 = llvm::countr_zero(Imm & ~63U);
136 if ((llvm::rotr<uint32_t>(Imm, RotAmt2) & ~255U) == 0)
208 /// getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed
210 inline unsigned getThumbImmValShift(unsigned Imm) {
213 if ((Imm & ~255U) == 0) return 0;
216 return llvm::countr_zero(Imm);
227 /// getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed
229 inline unsigned getThumbImm16ValShift(unsigned Imm) {
232 if ((Imm & ~65535U) == 0) return 0;
235 return llvm::countr_zero(Imm);
263 unsigned u, Vs, Imm;
271 Imm = Vs & 0xff;
273 u = Imm | (Imm << 16);
277 return (((Vs == V) ? 1 : 2) << 8) | Imm;
281 return (3 << 8) | Imm;
328 inline bool isT2SOImmTwoPartVal(unsigned Imm) {
329 unsigned V = Imm;
343 V = Imm;
355 inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) {
356 assert (isT2SOImmTwoPartVal(Imm) &&
359 unsigned V = llvm::rotr<uint32_t>(~255, getT2SOImmValRotate(Imm)) & Imm;
364 if (getT2SOImmValSplatVal(Imm & 0xff00ff00U) != -1)
365 return Imm & 0xff00ff00U;
368 assert (getT2SOImmValSplatVal(Imm & 0x00ff00ffU) != -1);
369 return Imm & 0x00ff00ffU;
372 inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) {
374 Imm ^= getT2SOImmTwoPartFirst(Imm);
376 assert (getT2SOImmVal(Imm) != -1 &&
378 return Imm;
402 assert(Imm12 < (1 << 12) && "Imm too large!");
631 inline float getFPImmFloat(unsigned Imm) {
634 uint8_t Sign = (Imm >> 7) & 0x1;
635 uint8_t Exp = (Imm >> 4) & 0x7;
636 uint8_t Mantissa = Imm & 0xf;
654 inline int getFP16Imm(const APInt &Imm) {
655 uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
656 int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15
657 int64_t Mantissa = Imm.getZExtValue() & 0x3ff; // 10 bits
679 inline int getFP32FP16Imm(const APInt &Imm) {
680 if (Imm.getActiveBits() > 16)
682 return ARM_AM::getFP16Imm(Imm.trunc(16));
692 inline int getFP32Imm(const APInt &Imm) {
693 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
694 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127
695 int64_t Mantissa = Imm.getZExtValue() & 0x7fffff; // 23 bits
720 inline int getFP64Imm(const APInt &Imm) {
721 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
722 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
723 uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;