Lines Matching defs:Val
262 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
265 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
268 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
271 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
274 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
334 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
337 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
340 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val,
343 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
352 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
355 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Val,
358 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Val,
361 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Val,
364 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Val,
367 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val,
370 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val,
373 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val,
376 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Val,
379 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val,
382 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val,
385 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Val,
388 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Val,
394 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Val,
397 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
400 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
403 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
406 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
484 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Val, uint64_t Address,
490 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
493 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
496 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
499 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
502 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
505 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
508 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
511 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
514 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Val,
528 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address,
530 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address,
532 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
535 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val,
538 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val,
541 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address,
544 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address,
546 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
550 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val,
554 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val,
557 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Val,
572 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
575 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Val,
578 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Val,
581 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address,
583 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
586 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
589 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val, uint64_t Address,
597 static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val, uint64_t Address,
599 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Val,
602 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, unsigned Val,
606 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address,
608 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,
611 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
622 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val,
627 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val,
632 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val,
635 static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned Val,
638 static DecodeStatus DecodeVpredNOperand(MCInst &Inst, unsigned Val,
642 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
645 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
648 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
651 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
658 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val,
662 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val,
666 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val,
670 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val,
675 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address,
686 typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val,
1632 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
1636 if (Val == 0xF) return MCDisassembler::Fail;
1638 if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
1642 if (Val != ARMCC::AL && !MCII->get(Inst.getOpcode()).isPredicable())
1644 Inst.addOperand(MCOperand::createImm(Val));
1645 if (Val == ARMCC::AL) {
1652 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
1655 if (Val)
1662 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val,
1667 unsigned Rm = fieldFromInstruction(Val, 0, 4);
1668 unsigned type = fieldFromInstruction(Val, 5, 2);
1669 unsigned imm = fieldFromInstruction(Val, 7, 5);
1700 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val,
1705 unsigned Rm = fieldFromInstruction(Val, 0, 4);
1706 unsigned type = fieldFromInstruction(Val, 5, 2);
1707 unsigned Rs = fieldFromInstruction(Val, 8, 4);
1736 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
1764 if (Val == 0) return MCDisassembler::Fail;
1766 if (Val & (1 << i)) {
1784 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
1789 unsigned Vd = fieldFromInstruction(Val, 8, 5);
1790 unsigned regs = fieldFromInstruction(Val, 0, 8);
1809 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
1814 unsigned Vd = fieldFromInstruction(Val, 8, 5);
1815 unsigned regs = fieldFromInstruction(Val, 1, 7);
1835 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val,
1843 unsigned msb = fieldFromInstruction(Val, 5, 5);
1844 unsigned lsb = fieldFromInstruction(Val, 0, 5);
2148 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val,
2153 unsigned Rn = fieldFromInstruction(Val, 13, 4);
2154 unsigned Rm = fieldFromInstruction(Val, 0, 4);
2155 unsigned type = fieldFromInstruction(Val, 5, 2);
2156 unsigned imm = fieldFromInstruction(Val, 7, 5);
2157 unsigned U = fieldFromInstruction(Val, 12, 1);
2816 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
2821 unsigned add = fieldFromInstruction(Val, 12, 1);
2822 unsigned imm = fieldFromInstruction(Val, 0, 12);
2823 unsigned Rn = fieldFromInstruction(Val, 13, 4);
2837 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
2842 unsigned Rn = fieldFromInstruction(Val, 9, 4);
2844 unsigned U = fieldFromInstruction(Val, 8, 1);
2845 unsigned imm = fieldFromInstruction(Val, 0, 8);
2858 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val,
2863 unsigned Rn = fieldFromInstruction(Val, 9, 4);
2865 unsigned U = fieldFromInstruction(Val, 8, 1);
2866 unsigned imm = fieldFromInstruction(Val, 0, 8);
2879 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
2882 return DecodeGPRRegisterClass(Inst, Val, Address, Decoder);
2942 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
2947 unsigned Rm = fieldFromInstruction(Val, 0, 4);
2948 unsigned align = fieldFromInstruction(Val, 4, 2);
3870 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
3873 Inst.addOperand(MCOperand::createImm(8 - Val));
3877 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
3880 Inst.addOperand(MCOperand::createImm(16 - Val));
3884 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
3887 Inst.addOperand(MCOperand::createImm(32 - Val));
3891 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
3894 Inst.addOperand(MCOperand::createImm(64 - Val));
3960 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
3963 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<12>(Val<<1) + 4,
3965 Inst.addOperand(MCOperand::createImm(SignExtend32<12>(Val << 1)));
3969 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
3972 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<21>(Val) + 4,
3974 Inst.addOperand(MCOperand::createImm(SignExtend32<21>(Val)));
3978 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
3981 if (!tryAddingSymbolicOperand(Address, Address + (Val<<1) + 4,
3983 Inst.addOperand(MCOperand::createImm(Val << 1));
3987 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
3992 unsigned Rn = fieldFromInstruction(Val, 0, 3);
3993 unsigned Rm = fieldFromInstruction(Val, 3, 3);
4003 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
4008 unsigned Rn = fieldFromInstruction(Val, 0, 3);
4009 unsigned imm = fieldFromInstruction(Val, 3, 5);
4018 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
4021 unsigned imm = Val << 2;
4029 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
4033 Inst.addOperand(MCOperand::createImm(Val));
4038 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
4043 unsigned Rn = fieldFromInstruction(Val, 6, 4);
4044 unsigned Rm = fieldFromInstruction(Val, 2, 4);
4045 unsigned imm = fieldFromInstruction(Val, 0, 2);
4411 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address,
4413 if (Val == 0)
4416 int imm = Val & 0xFF;
4418 if (!(Val & 0x100)) imm *= -1;
4425 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address,
4427 if (Val == 0)
4430 int imm = Val & 0x7F;
4432 if (!(Val & 0x80))
4440 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
4445 unsigned Rn = fieldFromInstruction(Val, 9, 4);
4446 unsigned imm = fieldFromInstruction(Val, 0, 9);
4456 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val,
4461 unsigned Rn = fieldFromInstruction(Val, 8, 4);
4462 unsigned imm = fieldFromInstruction(Val, 0, 8);
4472 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val,
4477 unsigned Rn = fieldFromInstruction(Val, 8, 4);
4478 unsigned imm = fieldFromInstruction(Val, 0, 8);
4488 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address,
4490 int imm = Val & 0xFF;
4491 if (Val == 0)
4493 else if (!(Val & 0x100))
4501 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address,
4503 int imm = Val & 0x7F;
4504 if (Val == 0)
4506 else if (!(Val & 0x80))
4515 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
4520 unsigned Rn = fieldFromInstruction(Val, 9, 4);
4521 unsigned imm = fieldFromInstruction(Val, 0, 9);
4563 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val,
4568 unsigned Rn = fieldFromInstruction(Val, 8, 3);
4569 unsigned imm = fieldFromInstruction(Val, 0, 8);
4580 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val,
4585 unsigned Rn = fieldFromInstruction(Val, 8, 4);
4586 unsigned imm = fieldFromInstruction(Val, 0, 8);
4660 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
4665 unsigned Rn = fieldFromInstruction(Val, 13, 4);
4666 unsigned imm = fieldFromInstruction(Val, 0, 12);
4790 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val,
4793 // Val is passed in as S:J1:J2:imm10H:imm10L:'0'
4800 unsigned S = (Val >> 23) & 1;
4801 unsigned J1 = (Val >> 22) & 1;
4802 unsigned J2 = (Val >> 21) & 1;
4805 unsigned tmp = (Val & ~0x600000) | (I1 << 22) | (I2 << 21);
4815 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val,
4818 if (Val == 0xA || Val == 0xB)
4824 if (!isValidCoprocessorNumber(Val, featureBits))
4827 Inst.addOperand(MCOperand::createImm(Val));
4892 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address,
4894 unsigned ctrl = fieldFromInstruction(Val, 10, 2);
4896 unsigned byte = fieldFromInstruction(Val, 8, 2);
4897 unsigned imm = fieldFromInstruction(Val, 0, 8);
4914 unsigned unrot = fieldFromInstruction(Val, 0, 7) | 0x80;
4915 unsigned rot = fieldFromInstruction(Val, 7, 5);
4923 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
4926 if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<9>(Val<<1) + 4,
4928 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(Val << 1)));
4932 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
4935 // Val is passed in as S:J1:J2:imm10:imm11
4942 unsigned S = (Val >> 23) & 1;
4943 unsigned J1 = (Val >> 22) & 1;
4944 unsigned J2 = (Val >> 21) & 1;
4947 unsigned tmp = (Val & ~0x600000) | (I1 << 22) | (I2 << 21);
4956 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val,
4959 if (Val & ~0xf)
4962 Inst.addOperand(MCOperand::createImm(Val));
4966 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val,
4969 if (Val & ~0xf)
4972 Inst.addOperand(MCOperand::createImm(Val));
4976 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address,
4983 unsigned ValLow = Val & 0xff;
5049 unsigned Mask = fieldFromInstruction(Val, 10, 2);
5070 if (Val == 0)
5073 Inst.addOperand(MCOperand::createImm(Val));
5077 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val,
5080 unsigned R = fieldFromInstruction(Val, 5, 1);
5081 unsigned SysM = fieldFromInstruction(Val, 0, 5);
5089 Inst.addOperand(MCOperand::createImm(Val));
5957 unsigned Val = fieldFromInstruction(Insn, 0, 8);
5958 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
5959 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
5964 if (!Val) {
5968 Val = -Val;
5970 Inst.addOperand(MCOperand::createImm(Val));
5974 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val,
5980 if (Val == 0x20) S = MCDisassembler::Fail;
5981 Inst.addOperand(MCOperand::createImm(Val));
6163 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address,
6167 unsigned Rn = fieldFromInstruction(Val, 16, 4);
6168 unsigned Rt = fieldFromInstruction(Val, 12, 4);
6169 unsigned Rm = fieldFromInstruction(Val, 0, 4);
6170 Rm |= (fieldFromInstruction(Val, 23, 1) << 4);
6171 unsigned Cond = fieldFromInstruction(Val, 28, 4);
6173 if (fieldFromInstruction(Val, 8, 4) != 0 || Rn == Rt)
6190 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,
6195 unsigned CRm = fieldFromInstruction(Val, 0, 4);
6196 unsigned opc1 = fieldFromInstruction(Val, 4, 4);
6197 unsigned cop = fieldFromInstruction(Val, 8, 4);
6198 unsigned Rt = fieldFromInstruction(Val, 12, 4);
6199 unsigned Rt2 = fieldFromInstruction(Val, 16, 4);
6236 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
6255 unsigned Rt = fieldFromInstruction(Val, 12, 4);
6279 unsigned pred = fieldFromInstruction(Val, 28, 4);
6288 static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val,
6292 if (Val == 0 && !zeroPermitted)
6297 DecVal = SignExtend32<size + 1>(Val << 1);
6299 DecVal = (Val << 1);
6307 static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val,
6312 Val = LocImm + (2 << Val);
6313 if (!tryAddingSymbolicOperand(Address, Address + Val + 4, true, 4, Inst,
6315 Inst.addOperand(MCOperand::createImm(Val));
6319 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val,
6322 if (Val >= ARMCC::AL) // also exclude the non-condition NV
6324 Inst.addOperand(MCOperand::createImm(Val));
6390 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val,
6395 if (Val == 0)
6396 Val = 32;
6398 Inst.addOperand(MCOperand::createImm(Val));
6512 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val,
6526 CurBit ^= (Val >> i) & 1U;
6532 if ((Val & ~(~0U << i)) == 0) {
6568 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
6570 Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::EQ : ARMCC::NE));
6575 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
6578 switch (Val & 0x3) {
6597 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
6599 Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::HS : ARMCC::HI));
6604 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
6607 switch (Val) {
6634 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Val,
6639 unsigned DecodedVal = 64 - Val;
6658 Inst.addOperand(MCOperand::createImm(64 - Val));
6678 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val,
6704 unsigned Rn = fieldFromInstruction(Val, 16, 4);
6705 unsigned addr = fieldFromInstruction(Val, 0, 7) |
6706 (fieldFromInstruction(Val, 23, 1) << 7) | (Rn << 8);
6722 DecodeMVE_MEM_pre(MCInst &Inst, unsigned Val, uint64_t Address,
6727 unsigned Qd = fieldFromInstruction(Val, 13, 3);
6728 unsigned addr = fieldFromInstruction(Val, 0, 7) |
6729 (fieldFromInstruction(Val, 23, 1) << 7) | (Rn << 8);
6742 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val,
6745 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,
6746 fieldFromInstruction(Val, 16, 3),
6752 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val,
6755 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,
6756 fieldFromInstruction(Val, 16, 4),
6762 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val,
6765 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,
6766 fieldFromInstruction(Val, 17, 3),
6772 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val,
6777 if (Val < MinLog || Val > MaxLog)
6780 Inst.addOperand(MCOperand::createImm(1LL << Val));
6786 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address,
6790 Inst.addOperand(MCOperand::createImm(start + Val));