Lines Matching defs:newOpc

10412     unsigned newOpc;
10415     case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRrr : ARM::t2ASRrr; break;
10416     case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRrr : ARM::t2LSRrr; break;
10417     case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLrr : ARM::t2LSLrr; break;
10418     case ARM_AM::ror: newOpc = isNarrow ? ARM::tROR   : ARM::t2RORrr; break;
10420     TmpInst.setOpcode(newOpc);
10447     unsigned newOpc;
10461       newOpc = isNarrow ? ARM::tMOVSr : ARM::t2MOVr;
10465       case ARM_AM::asr: newOpc = isNarrow ? ARM::tASRri : ARM::t2ASRri; break;
10466       case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRri : ARM::t2LSRri; break;
10467       case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
10468       case ARM_AM::ror: newOpc = ARM::t2RORri; isNarrow = false; break;
10469       case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break;
10473     TmpInst.setOpcode(newOpc);
10479     if (newOpc != ARM::t2RRX && !isMov)
10949     unsigned newOpc;
10954     case ARM::ANDrsi: newOpc = ARM::ANDrr; break;
10955     case ARM::ORRrsi: newOpc = ARM::ORRrr; break;
10956     case ARM::EORrsi: newOpc = ARM::EORrr; break;
10957     case ARM::BICrsi: newOpc = ARM::BICrr; break;
10958     case ARM::SUBrsi: newOpc = ARM::SUBrr; break;
10959     case ARM::ADDrsi: newOpc = ARM::ADDrr; break;
10966       TmpInst.setOpcode(newOpc);