Lines Matching defs:ARMOperand
76 class ARMOperand;
403 // The mask should be in the format used in ARMOperand and
500 std::unique_ptr<ARMOperand> defaultCondCodeOp();
501 std::unique_ptr<ARMOperand> defaultCCOutOp();
502 std::unique_ptr<ARMOperand> defaultVPTPredOp();
769 /// ARMOperand - Instances of this class represent a parsed ARM machine
771 class ARMOperand : public MCParsedAsmOperand {
965 ARMOperand(KindTy K, ARMAsmParser &Parser) : Kind(K), Parser(&Parser) {}
3633 static std::unique_ptr<ARMOperand> CreateITMask(unsigned Mask, SMLoc S,
3635 auto Op = std::make_unique<ARMOperand>(k_ITCondMask, Parser);
3642 static std::unique_ptr<ARMOperand>
3644 auto Op = std::make_unique<ARMOperand>(k_CondCode, Parser);
3651 static std::unique_ptr<ARMOperand> CreateVPTPred(ARMVCC::VPTCodes CC, SMLoc S,
3653 auto Op = std::make_unique<ARMOperand>(k_VPTPred, Parser);
3660 static std::unique_ptr<ARMOperand> CreateCoprocNum(unsigned CopVal, SMLoc S,
3662 auto Op = std::make_unique<ARMOperand>(k_CoprocNum, Parser);
3669 static std::unique_ptr<ARMOperand> CreateCoprocReg(unsigned CopVal, SMLoc S,
3671 auto Op = std::make_unique<ARMOperand>(k_CoprocReg, Parser);
3678 static std::unique_ptr<ARMOperand>
3680 auto Op = std::make_unique<ARMOperand>(k_CoprocOption, Parser);
3687 static std::unique_ptr<ARMOperand> CreateCCOut(unsigned RegNum, SMLoc S,
3689 auto Op = std::make_unique<ARMOperand>(k_CCOut, Parser);
3696 static std::unique_ptr<ARMOperand> CreateToken(StringRef Str, SMLoc S,
3698 auto Op = std::make_unique<ARMOperand>(k_Token, Parser);
3706 static std::unique_ptr<ARMOperand> CreateReg(unsigned RegNum, SMLoc S,
3708 auto Op = std::make_unique<ARMOperand>(k_Register, Parser);
3715 static std::unique_ptr<ARMOperand>
3719 auto Op = std::make_unique<ARMOperand>(k_ShiftedRegister, Parser);
3729 static std::unique_ptr<ARMOperand>
3733 auto Op = std::make_unique<ARMOperand>(k_ShiftedImmediate, Parser);
3742 static std::unique_ptr<ARMOperand> CreateShifterImm(bool isASR, unsigned Imm,
3745 auto Op = std::make_unique<ARMOperand>(k_ShifterImmediate, Parser);
3753 static std::unique_ptr<ARMOperand>
3755 auto Op = std::make_unique<ARMOperand>(k_RotateImmediate, Parser);
3762 static std::unique_ptr<ARMOperand> CreateModImm(unsigned Bits, unsigned Rot,
3765 auto Op = std::make_unique<ARMOperand>(k_ModifiedImmediate, Parser);
3773 static std::unique_ptr<ARMOperand>
3776 auto Op = std::make_unique<ARMOperand>(k_ConstantPoolImmediate, Parser);
3783 static std::unique_ptr<ARMOperand> CreateBitfield(unsigned LSB,
3787 auto Op = std::make_unique<ARMOperand>(k_BitfieldDescriptor, Parser);
3795 static std::unique_ptr<ARMOperand>
3820 auto Op = std::make_unique<ARMOperand>(Kind, Parser);
3829 static std::unique_ptr<ARMOperand>
3832 auto Op = std::make_unique<ARMOperand>(k_VectorList, Parser);
3841 static std::unique_ptr<ARMOperand>
3844 auto Op = std::make_unique<ARMOperand>(k_VectorListAllLanes, Parser);
3853 static std::unique_ptr<ARMOperand>
3857 auto Op = std::make_unique<ARMOperand>(k_VectorListIndexed, Parser);
3867 static std::unique_ptr<ARMOperand> CreateVectorIndex(unsigned Idx, SMLoc S,
3870 auto Op = std::make_unique<ARMOperand>(k_VectorIndex, Parser);
3877 static std::unique_ptr<ARMOperand> CreateImm(const MCExpr *Val, SMLoc S,
3879 auto Op = std::make_unique<ARMOperand>(k_Immediate, Parser);
3886 static std::unique_ptr<ARMOperand>
3891 auto Op = std::make_unique<ARMOperand>(k_Memory, Parser);
3905 static std::unique_ptr<ARMOperand>
3908 auto Op = std::make_unique<ARMOperand>(k_PostIndexRegister, Parser);
3918 static std::unique_ptr<ARMOperand>
3920 auto Op = std::make_unique<ARMOperand>(k_MemBarrierOpt, Parser);
3927 static std::unique_ptr<ARMOperand>
3930 auto Op = std::make_unique<ARMOperand>(k_InstSyncBarrierOpt, Parser);
3937 static std::unique_ptr<ARMOperand>
3940 auto Op = std::make_unique<ARMOperand>(k_TraceSyncBarrierOpt, Parser);
3947 static std::unique_ptr<ARMOperand>
3949 auto Op = std::make_unique<ARMOperand>(k_ProcIFlags, Parser);
3956 static std::unique_ptr<ARMOperand> CreateMSRMask(unsigned MMask, SMLoc S,
3958 auto Op = std::make_unique<ARMOperand>(k_MSRMask, Parser);
3965 static std::unique_ptr<ARMOperand> CreateBankedReg(unsigned Reg, SMLoc S,
3967 auto Op = std::make_unique<ARMOperand>(k_BankedReg, Parser);
3977 void ARMOperand::print(raw_ostream &OS) const {
4157 static_cast<ARMOperand &>(*Operands[0]).getToken() == "cps") {
4159 static_cast<ARMOperand &>(*Operands[1]).getImm()->getKind() ==
4162 static_cast<ARMOperand &>(*Operands[1]).getImm())
4165 static_cast<ARMOperand &>(*Operands[1]).getImm())
4173 auto Op = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]);
4310 std::unique_ptr<ARMOperand> PrevOp(
4311 (ARMOperand *)Operands.pop_back_val().release());
4371 Operands.push_back(ARMOperand::CreateShiftedRegister(
4374 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm,
4395 ARMOperand::CreateReg(RegNo, RegStartLoc, RegEndLoc, *this));
4399 Operands.push_back(ARMOperand::CreateToken(ExclaimTok.getString(),
4425 Operands.push_back(ARMOperand::CreateVectorIndex(MCE->getValue(), SIdx, E,
4494 ARMOperand::CreateCondCode(ARMCC::CondCodes(CC), S, *this));
4516 Operands.push_back(ARMOperand::CreateCoprocNum(Num, S, *this));
4535 Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S, *this));
4566 Operands.push_back(ARMOperand::CreateCoprocOption(Val, S, E, *this));
4769 Operands.push_back(ARMOperand::CreateRegList(Registers, S, E, *this));
4774 ARMOperand::CreateToken("^", Parser.getTok().getLoc(), *this));
4847 Operands.push_back(ARMOperand::CreateReg(Reg, S, E, *this));
4851 ARMOperand::CreateVectorListAllLanes(Reg, 1, false, S, E, *this));
4854 Operands.push_back(ARMOperand::CreateVectorListIndexed(
4867 Operands.push_back(ARMOperand::CreateReg(Reg, S, E, *this));
4873 ARMOperand::CreateVectorListAllLanes(Reg, 2, false, S, E, *this));
4876 Operands.push_back(ARMOperand::CreateVectorListIndexed(
4882 Operands.push_back(ARMOperand::CreateReg(Reg, S, E, *this));
5034 auto Create = (LaneKind == NoLanes ? ARMOperand::CreateVectorList :
5035 ARMOperand::CreateVectorListAllLanes);
5040 Operands.push_back(ARMOperand::CreateVectorListIndexed(
5109 ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S, *this));
5128 ARMOperand::CreateTraceSyncBarrierOpt(ARM_TSB::CSYNC, S, *this));
5172 Operands.push_back(ARMOperand::CreateInstSyncBarrierOpt(
5208 ARMOperand::CreateProcIFlags((ARM_PROC::IFlags)IFlags, S, *this));
5215 if (static_cast<ARMOperand &>(*Operands.back()).isMSRMask() ||
5216 static_cast<ARMOperand &>(*Operands.back()).isBankedReg())
5229 Operands.push_back(ARMOperand::CreateMSRMask(SYSmvalue, S, *this));
5245 Operands.push_back(ARMOperand::CreateMSRMask(SYSmvalue, S, *this));
5308 Operands.push_back(ARMOperand::CreateMSRMask(FlagsVal, S, *this));
5316 if (static_cast<ARMOperand &>(*Operands.back()).isBankedReg() ||
5317 static_cast<ARMOperand &>(*Operands.back()).isMSRMask())
5332 Operands.push_back(ARMOperand::CreateBankedReg(Encoding, S, *this));
5374 Operands.push_back(ARMOperand::CreateImm(CE, Loc, EndLoc, *this));
5393 Operands.push_back(ARMOperand::CreateImm(
5450 ARMOperand::CreateShifterImm(isASR, Val, S, EndLoc, *this));
5491 Operands.push_back(ARMOperand::CreateRotImm(Val, S, EndLoc, *this));
5541 Operands.push_back(ARMOperand::CreateModImm(
5553 Operands.push_back(ARMOperand::CreateImm(Imm1Exp, Sx1, Ex1, *this));
5559 Operands.push_back(ARMOperand::CreateImm(Imm1Exp, Sx1, Ex1, *this));
5593 Operands.push_back(ARMOperand::CreateModImm(Imm1, Imm2, S, Ex2, *this));
5648 Operands.push_back(ARMOperand::CreateBitfield(LSB, Width, S, EndLoc, *this));
5696 ARMOperand::CreatePostIdxReg(Reg, isAdd, ShiftTy, ShiftImm, S, E, *this));
5737 Operands.push_back(ARMOperand::CreateImm(
5762 Operands.push_back(ARMOperand::CreatePostIdxReg(
5772 auto Op = static_cast<ARMOperand &>(*Operands[I]);
5782 auto Op = static_cast<ARMOperand &>(*Operands[I]);
5806 if (((ARMOperand &)*Operands[RegRd]).getReg() ==
5807 ((ARMOperand &)*Operands[MnemonicOpsEndInd + 1]).getReg()) {
5817 ((ARMOperand &)*Operands[RegRd]).addRegOperands(Inst, 1);
5820 ((ARMOperand &)*Operands[CondOutI]).addCCOutOperands(Inst, 1);
5822 ARMOperand Op =
5823 *ARMOperand::CreateCCOut(0, Operands[0]->getEndLoc(), *this);
5827 ((ARMOperand &)*Operands[RegRn]).addRegOperands(Inst, 1);
5829 ((ARMOperand &)*Operands[RegRm]).addRegOperands(Inst, 1);
5833 ((ARMOperand &)*Operands[CondI]).addCondCodeOperands(Inst, 2);
5835 ARMOperand Op = *ARMOperand::CreateCondCode(
5847 : static_cast<ARMOperand &>(*Operands[CondI]).getCondCode());
5875 ARMOperand &op = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]);
5882 ARMOperand &op = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]);
5888 ((ARMOperand &)*Operands[MnemonicOpsEndInd]).addImmOperands(Inst, 1);
5890 ((ARMOperand &)*Operands[CondI]).addCondCodeOperands(Inst, 2);
5892 ARMOperand Op = *ARMOperand::CreateCondCode(
5907 ((ARMOperand &)*Operands[MnemonicOpsEndInd]).addRegOperands(Inst, 1); // Rt
5908 ((ARMOperand &)*Operands[MnemonicOpsEndInd + 1])
5910 ((ARMOperand &)*Operands[MnemonicOpsEndInd + 2])
5912 ((ARMOperand &)*Operands[MnemonicOpsEndInd + 3])
5915 ((ARMOperand &)*Operands[MnemonicOpsEndInd + 5])
5918 ((ARMOperand &)*Operands[CondI])
5921 ARMOperand Op =
5922 *ARMOperand::CreateCondCode(ARMCC::AL, Operands[0]->getEndLoc(), *this);
5952 Operands.push_back(ARMOperand::CreateMem(
5959 ARMOperand::CreateToken("!", Parser.getTok().getLoc(), *this));
6009 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, 0,
6017 ARMOperand::CreateToken("!", Parser.getTok().getLoc(), *this));
6053 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, AdjustedOffset, 0,
6067 ARMOperand::CreateToken("!", Parser.getTok().getLoc(), *this));
6104 Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, OffsetRegNum,
6112 ARMOperand::CreateToken("!", Parser.getTok().getLoc(), *this));
6219 ARMOperand &TyOp = static_cast<ARMOperand &>(*Operands[I]);
6228 ARMOperand &Mnemonic = static_cast<ARMOperand &>(*Operands[0]);
6251 ARMOperand::CreateImm(MCConstantExpr::create(IntVal, getContext()), S,
6266 ARMOperand::CreateImm(MCConstantExpr::create(Val, getContext()), S,
6313 Operands.push_back(ARMOperand::CreateToken("APSR_nzcv", S, *this));
6333 Operands.push_back(ARMOperand::CreateImm(IdVal, S, E, *this));
6377 Operands.push_back(ARMOperand::CreateImm(ImmVal, S, E, *this));
6383 Operands.push_back(ARMOperand::CreateToken(
6409 Operands.push_back(ARMOperand::CreateImm(ExprVal, S, E, *this));
6425 ARMOperand::CreateConstantPoolImm(SubExprVal, S, E, *this));
6746 auto &Op = static_cast<ARMOperand &>(*Operands[I]);
6766 const auto &Op3 = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]);
6767 auto &Op4 = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1]);
6778 auto &Op5 = static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 2]);
6809 const ARMOperand *LastOp = &Op5;
6845 ARMOperand &Op = static_cast<ARMOperand &>(MCOp);
6879 if (static_cast<ARMOperand &>(*Operand).isVectorIndex() ||
6894 if (static_cast<ARMOperand &>(*Operand).isVectorIndex() ||
6895 static_cast<ARMOperand &>(*Operand).isQReg())
6936 ARMOperand &Op2 = static_cast<ARMOperand &>(*Operands[IdX]);
6937 ARMOperand &Op3 = static_cast<ARMOperand &>(*Operands[IdX + 1]);
6962 ARMOperand::CreateReg(PairedReg, Op2.getStartLoc(),
7023 ARMOperand::CreateReg(RPair, Op2.getStartLoc(), Op2.getEndLoc(), *this);
7029 if (static_cast<ARMOperand &>(*Operands[I]).isCondCode()) {
7038 if (static_cast<ARMOperand &>(*Operands[I]).isCCOut()) {
7047 if (static_cast<ARMOperand &>(*Operands[I]).isVPTPred()) {
7096 Operands.push_back(ARMOperand::CreateToken(Mnemonic, NameLoc, *this));
7098 // Handle the mask for IT and VPT instructions. In ARMOperand and
7128 Operands.push_back(ARMOperand::CreateITMask(Mask, Loc, *this));
7169 ARMOperand::CreateCCOut(CarrySetting ? ARM::CPSR : 0, Loc, *this));
7176 Operands.push_back(ARMOperand::CreateCondCode(
7188 Operands.push_back(ARMOperand::CreateVPTPred(
7194 Operands.push_back(ARMOperand::CreateImm(
7225 Operands.push_back(ARMOperand::CreateToken(ExtraToken, Loc, *this));
7284 ARMOperand::CreateVPTPred(ARMVCC::None, PLoc, *this));
7285 Operands.insert(Operands.begin(), ARMOperand::CreateToken(
7300 ARMOperand::CreateVPTPred(ARMVCC::Else, PLoc, *this));
7302 ARMOperand::CreateToken(StringRef("vcvtn"), MLoc, *this));
7312 Operands.insert(Operands.begin(), ARMOperand::CreateToken(
7328 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd - 2]);
7330 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd - 1]);
7339 ARMOperand::CreateToken(Mnemonic, MLoc, *this));
7346 ARMOperand::CreateVPTPred(
7364 if (static_cast<ARMOperand &>(*Operands[I]).isVPTPred())
7377 ARMOperand::CreateToken(Mnemonic, NameLoc, *this));
7388 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]).isImm())
7406 ARMOperand &Op1 = static_cast<ARMOperand &>(*Operands[Idx]);
7407 ARMOperand &Op2 = static_cast<ARMOperand &>(*Operands[Idx + 1]);
7431 Operands[Idx] = ARMOperand::CreateReg(NewReg, Op1.getStartLoc(),
7444 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]).isReg() &&
7445 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]).getReg() ==
7447 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1]).isReg() &&
7448 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1]).getReg() ==
7450 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 2]).isImm()) {
7451 Operands.front() = ARMOperand::CreateToken(Name, NameLoc, *this);
7500 const ARMOperand &Op = static_cast<const ARMOperand &>(*Operands[I]);
7620 ARMOperand &Op = static_cast<ARMOperand &>(MCOp);
7652 if (static_cast<ARMOperand &>(*Operands[I]).isCondCode())
7699 if (static_cast<ARMOperand &>(*Operands[I]).isVPTPred())
7722 ARMOperand &Op = static_cast<ARMOperand &>(
8059 (static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8061 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8203 if (!(static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd]))
8211 ARMOperand &Operand = static_cast<ARMOperand &>(*Operands[op]);
8220 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd])
8228 if (!static_cast<ARMOperand &>(*Operands[Op]).isSignedOffset<20, 1>())
8234 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8253 ARMOperand &Op = static_cast<ARMOperand &>(*Operands[i]);
8302 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd])
8310 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8315 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8323 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd])
8329 if (!static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8399 ARMOperand &Op =
8400 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1]);
8453 if (static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 3])
8455 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 5])
8467 if (static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
8469 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 3])
8890 ARMOperand &ARMOp = static_cast<ARMOperand&>(*Op);
8904 ARMOperand &Op = static_cast<ARMOperand &>(
9231 const ARMOperand &PoolOperand =
9232 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1]);
10594 if (static_cast<ARMOperand &>(*Operands[0]).getToken() == "pop" &&
10612 if (static_cast<ARMOperand &>(*Operands[0]).getToken() == "push" &&
10631 const StringRef Token = static_cast<ARMOperand &>(*Operands[0]).getToken();
10791 (static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
10793 static_cast<ARMOperand &>(*Operands[MnemonicOpsEndInd + 1])
11102 static_cast<ARMOperand &>(*Operands[0]).getToken() == "nop" &&
11422 ((ARMOperand &)*Operands[0]).getToken(), FBS);
11424 ((ARMOperand &)*Operands[0]).getLocRange());
12172 ARMOperand &Op = (ARMOperand &)*Operands[0];
12520 ARMOperand &Op = (ARMOperand &)*Operands[0];
12562 ARMOperand &Op = (ARMOperand &)*Operands[0];
12739 ((ARMOperand &)*Operands[I.getOperandIndex()]).getStartLoc();
12842 ARMOperand &Op = static_cast<ARMOperand &>(*Operands[0]);
12863 SMLoc EndLoc = ((ARMOperand &)*Operands.back()).getEndLoc();
13011 ARMOperand &Op = static_cast<ARMOperand &>(AsmOp);
13098 std::unique_ptr<ARMOperand> ARMAsmParser::defaultCondCodeOp() {
13099 return ARMOperand::CreateCondCode(ARMCC::AL, SMLoc(), *this);
13102 std::unique_ptr<ARMOperand> ARMAsmParser::defaultCCOutOp() {
13103 return ARMOperand::CreateCCOut(0, SMLoc(), *this);
13106 std::unique_ptr<ARMOperand> ARMAsmParser::defaultVPTPredOp() {
13107 return ARMOperand::CreateVPTPred(ARMVCC::None, SMLoc(), *this);