Lines Matching defs:ARMAsmParser
1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
237 class ARMAsmParser : public MCTargetAsmParser {
688 ARMAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
813 ARMAsmParser *Parser;
965 ARMOperand(KindTy K, ARMAsmParser &Parser) : Kind(K), Parser(&Parser) {}
3634 ARMAsmParser &Parser) {
3643 CreateCondCode(ARMCC::CondCodes CC, SMLoc S, ARMAsmParser &Parser) {
3652 ARMAsmParser &Parser) {
3661 ARMAsmParser &Parser) {
3670 ARMAsmParser &Parser) {
3679 CreateCoprocOption(unsigned Val, SMLoc S, SMLoc E, ARMAsmParser &Parser) {
3688 ARMAsmParser &Parser) {
3697 ARMAsmParser &Parser) {
3707 SMLoc E, ARMAsmParser &Parser) {
3718 ARMAsmParser &Parser) {
3732 ARMAsmParser &Parser) {
3744 ARMAsmParser &Parser) {
3754 CreateRotImm(unsigned Imm, SMLoc S, SMLoc E, ARMAsmParser &Parser) {
3764 ARMAsmParser &Parser) {
3775 ARMAsmParser &Parser) {
3786 ARMAsmParser &Parser) {
3797 SMLoc StartLoc, SMLoc EndLoc, ARMAsmParser &Parser) {
3831 SMLoc S, SMLoc E, ARMAsmParser &Parser) {
3843 SMLoc S, SMLoc E, ARMAsmParser &Parser) {
3856 ARMAsmParser &Parser) {
3869 ARMAsmParser &Parser) {
3878 SMLoc E, ARMAsmParser &Parser) {
3889 bool isNegative, SMLoc S, SMLoc E, ARMAsmParser &Parser,
3907 unsigned ShiftImm, SMLoc S, SMLoc E, ARMAsmParser &Parser) {
3919 CreateMemBarrierOpt(ARM_MB::MemBOpt Opt, SMLoc S, ARMAsmParser &Parser) {
3929 ARMAsmParser &Parser) {
3939 ARMAsmParser &Parser) {
3948 CreateProcIFlags(ARM_PROC::IFlags IFlags, SMLoc S, ARMAsmParser &Parser) {
3957 ARMAsmParser &Parser) {
3966 ARMAsmParser &Parser) {
4201 bool ARMAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
4211 ParseStatus ARMAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
4221 int ARMAsmParser::tryParseRegister(bool AllowOutOfBoundReg) {
4274 std::optional<ARM_AM::ShiftOpc> ARMAsmParser::tryParseShiftToken() {
4296 int ARMAsmParser::tryParseShiftRegister(OperandVector &Operands) {
4386 bool ARMAsmParser::tryParseRegisterWithWriteBack(OperandVector &Operands) {
4482 ParseStatus ARMAsmParser::parseITCondCode(OperandVector &Operands) {
4502 ParseStatus ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands) {
4523 ParseStatus ARMAsmParser::parseCoprocRegOperand(OperandVector &Operands) {
4541 ParseStatus ARMAsmParser::parseCoprocOptionOperand(OperandVector &Operands) {
4611 bool ARMAsmParser::parseRegisterList(OperandVector &Operands, bool EnforceOrder,
4782 ParseStatus ARMAsmParser::parseVectorLane(VectorLaneTy &LaneKind,
4826 ParseStatus ARMAsmParser::parseVectorList(OperandVector &Operands) {
5048 ParseStatus ARMAsmParser::parseMemBarrierOptOperand(OperandVector &Operands) {
5114 ARMAsmParser::parseTraceSyncBarrierOptOperand(OperandVector &Operands) {
5134 ARMAsmParser::parseInstSyncBarrierOptOperand(OperandVector &Operands) {
5178 ParseStatus ARMAsmParser::parseProcIFlagsOperand(OperandVector &Operands) {
5213 ParseStatus ARMAsmParser::parseMSRMaskOperand(OperandVector &Operands) {
5314 ParseStatus ARMAsmParser::parseBankedRegOperand(OperandVector &Operands) {
5339 ParseStatus ARMAsmParser::parsePKHImm(OperandVector &Operands,
5379 ParseStatus ARMAsmParser::parseSetEndImm(OperandVector &Operands) {
5403 ParseStatus ARMAsmParser::parseShifterImm(OperandVector &Operands) {
5458 ParseStatus ARMAsmParser::parseRotImm(OperandVector &Operands) {
5496 ParseStatus ARMAsmParser::parseModImm(OperandVector &Operands) {
5603 ParseStatus ARMAsmParser::parseBitfield(OperandVector &Operands) {
5653 ParseStatus ARMAsmParser::parsePostIdxReg(OperandVector &Operands) {
5701 ParseStatus ARMAsmParser::parseAM3Offset(OperandVector &Operands) {
5792 void ARMAsmParser::cvtThumbMultiply(MCInst &Inst,
5841 void ARMAsmParser::cvtThumbBranches(MCInst &Inst,
5898 void ARMAsmParser::cvtMVEVMOVQtoDReg(
5929 bool ARMAsmParser::parseMemory(OperandVector &Operands) {
6123 bool ARMAsmParser::parseMemRegOffsetShift(ARM_AM::ShiftOpc &St,
6186 ParseStatus ARMAsmParser::parseFPImm(OperandVector &Operands) {
6276 bool ARMAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
6431 bool ARMAsmParser::parseImmExpr(int64_t &Out) {
6446 bool ARMAsmParser::parsePrefix(ARMMCExpr::VariantKind &RefKind) {
6540 StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic, StringRef ExtraToken,
6670 void ARMAsmParser::getMnemonicAcceptInfo(StringRef Mnemonic,
6757 void ARMAsmParser::tryConvertingToTwoOperandForm(
6863 bool ARMAsmParser::shouldOmitVectorPredicateOperand(
6922 void ARMAsmParser::fixupGNULDRDAlias(StringRef Mnemonic,
6971 bool ARMAsmParser::CDEConvertDualRegOperand(StringRef Mnemonic,
7055 bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
7508 bool ARMAsmParser::validatetLDMRegList(const MCInst &Inst,
7527 bool ARMAsmParser::validatetSTMRegList(const MCInst &Inst,
7549 bool ARMAsmParser::validateLDRDSTRD(MCInst &Inst, const OperandVector &Operands,
7633 bool ARMAsmParser::validateInstruction(MCInst &Inst,
8882 bool ARMAsmParser::processInstruction(MCInst &Inst,
11094 ARMAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
11113 unsigned ARMAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
11248 bool ARMAsmParser::isITBlockTerminator(MCInst &Inst) const {
11265 unsigned ARMAsmParser::MatchInstruction(OperandVector &Operands, MCInst &Inst,
11354 bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
11432 bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) {
11551 bool ARMAsmParser::parseLiteralValues(unsigned Size, SMLoc L) {
11564 bool ARMAsmParser::parseDirectiveThumb(SMLoc L) {
11578 bool ARMAsmParser::parseDirectiveARM(SMLoc L) {
11590 ARMAsmParser::getVariantKindForName(StringRef Name) const {
11620 void ARMAsmParser::doBeforeLabelEmit(MCSymbol *Symbol, SMLoc IDLoc) {
11626 void ARMAsmParser::onLabelParsed(MCSymbol *Symbol) {
11635 bool ARMAsmParser::parseDirectiveThumbFunc(SMLoc L) {
11671 bool ARMAsmParser::parseDirectiveSyntax(SMLoc L) {
11695 bool ARMAsmParser::parseDirectiveCode(SMLoc L) {
11731 bool ARMAsmParser::parseDirectiveReq(StringRef Name, SMLoc L) {
11750 bool ARMAsmParser::parseDirectiveUnreq(SMLoc L) {
11762 void ARMAsmParser::FixModeAfterArchChange(bool WasThumb, SMLoc Loc) {
11786 bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
11808 bool ARMAsmParser::parseDirectiveEabiAttr(SMLoc L) {
11906 bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
11926 bool ARMAsmParser::parseDirectiveFPU(SMLoc L) {
11946 bool ARMAsmParser::parseDirectiveFnStart(SMLoc L) {
11967 bool ARMAsmParser::parseDirectiveFnEnd(SMLoc L) {
11983 bool ARMAsmParser::parseDirectiveCantUnwind(SMLoc L) {
12009 bool ARMAsmParser::parseDirectivePersonality(SMLoc L) {
12050 bool ARMAsmParser::parseDirectiveHandlerData(SMLoc L) {
12070 bool ARMAsmParser::parseDirectiveSetFP(SMLoc L) {
12126 bool ARMAsmParser::parseDirectivePad(SMLoc L) {
12159 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) {
12186 bool ARMAsmParser::parseDirectiveInst(SMLoc Loc, char Suffix) {
12254 bool ARMAsmParser::parseDirectiveLtorg(SMLoc L) {
12261 bool ARMAsmParser::parseDirectiveEven(SMLoc L) {
12283 bool ARMAsmParser::parseDirectivePersonalityIndex(SMLoc L) {
12327 bool ARMAsmParser::parseDirectiveUnwindRaw(SMLoc L) {
12379 bool ARMAsmParser::parseDirectiveTLSDescSeq(SMLoc L) {
12399 bool ARMAsmParser::parseDirectiveMovSP(SMLoc L) {
12442 bool ARMAsmParser::parseDirectiveObjectArch(SMLoc L) {
12464 bool ARMAsmParser::parseDirectiveAlign(SMLoc L) {
12482 bool ARMAsmParser::parseDirectiveThumbSet(SMLoc L) {
12504 bool ARMAsmParser::parseDirectiveSEHAllocStack(SMLoc L, bool Wide) {
12515 bool ARMAsmParser::parseDirectiveSEHSaveRegs(SMLoc L, bool Wide) {
12544 bool ARMAsmParser::parseDirectiveSEHSaveSP(SMLoc L) {
12557 bool ARMAsmParser::parseDirectiveSEHSaveFRegs(SMLoc L) {
12598 bool ARMAsmParser::parseDirectiveSEHSaveLR(SMLoc L) {
12609 bool ARMAsmParser::parseDirectiveSEHPrologEnd(SMLoc L, bool Fragment) {
12617 bool ARMAsmParser::parseDirectiveSEHNop(SMLoc L, bool Wide) {
12625 bool ARMAsmParser::parseDirectiveSEHEpilogStart(SMLoc L, bool Condition) {
12645 bool ARMAsmParser::parseDirectiveSEHEpilogEnd(SMLoc L) {
12652 bool ARMAsmParser::parseDirectiveSEHCustom(SMLoc L) {
12672 RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
12673 RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
12674 RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());
12675 RegisterMCAsmParser<ARMAsmParser> B(getTheThumbBETarget());
12688 ARMAsmParser::getCustomOperandDiag(ARMMatchResultTy MatchError) {
12712 ARMAsmParser::FilterNearMisses(SmallVectorImpl<NearMissInfo> &NearMissesIn,
12878 void ARMAsmParser::ReportNearMisses(SmallVectorImpl<NearMissInfo> &NearMisses,
12900 bool ARMAsmParser::enableArchExtFeature(StringRef Name, SMLoc &ExtLoc) {
12982 bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
13009 unsigned ARMAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
13054 bool ARMAsmParser::isMnemonicVPTPredicable(StringRef Mnemonic,
13098 std::unique_ptr<ARMOperand> ARMAsmParser::defaultCondCodeOp() {
13102 std::unique_ptr<ARMOperand> ARMAsmParser::defaultCCOutOp() {
13106 std::unique_ptr<ARMOperand> ARMAsmParser::defaultVPTPredOp() {