Lines Matching full:loads
52 cl::desc("Limit the number of loads analysed"));
70 SmallVector<LoadInst*, 2> VecLd; // Container for loads to widen.
197 SmallVector<LoadInst*, 4> Loads;
202 append_range(Loads, Lds);
226 LoadInst* CreateWideLoad(MemInstList &Loads, IntegerType *LoadTy);
307 LLVM_DEBUG(dbgs() << "Loads are sequential and valid:\n";
337 /// Iterate through the block and record base, offset pairs of loads which can
340 SmallVector<LoadInst*, 8> Loads;
345 // Collect loads and instruction that may write to memory. For now we only
346 // record loads which are simple, sign-extended and have a single user.
347 // TODO: Allow zero-extended loads.
355 Loads.push_back(Ld);
358 if (Loads.empty() || Loads.size() > NumLoadLimit)
368 for (auto *Read : Loads) {
379 // Check whether there's not a write between the two loads which would
400 for (auto *Base : Loads) {
401 for (auto *Offset : Loads) {
500 // If constants are used instead of loads, these will need to be hoisted
503 // If loop invariants are used instead of loads, these need to be packed
551 // Check that the muls operate directly upon sign extended loads.
558 // The first elements of each vector should be loads with sexts. If we
559 // find that its two pairs of consecutive loads, then these can be
560 // transformed into two wider loads and the users can be replaced with
567 // Check that each mul is operating on two different loads.
573 LLVM_DEBUG(dbgs() << "OK: found two pairs of parallel loads!\n");
577 LLVM_DEBUG(dbgs() << "OK: found two pairs of parallel loads!\n");
584 LLVM_DEBUG(dbgs() << "OK: found two pairs of parallel loads!\n");
729 LoadInst* ARMParallelDSP::CreateWideLoad(MemInstList &Loads,
731 assert(Loads.size() == 2 && "currently only support widening two loads");
733 LoadInst *Base = Loads[0];
734 LoadInst *Offset = Loads[1];
740 && "Loads should have a single, extending, user");
775 // From the wide load, create two values that equal the original two loads.
776 // Loads[0] needs trunc while Loads[1] needs a lshr and trunc.
799 std::make_unique<WidenedLoad>(Loads, WideLoad)));