Lines Matching defs:Regs
180 ArrayRef<std::pair<unsigned, bool>> Regs,
186 ArrayRef<std::pair<unsigned, bool>> Regs,
585 /// Return the first register of class \p RegClass that is not in \p Regs.
617 static bool ContainsReg(const ArrayRef<std::pair<unsigned, bool>> &Regs,
619 for (const std::pair<unsigned, bool> &R : Regs)
626 /// Regs as the register operands that would be loaded / stored. It returns
632 ArrayRef<std::pair<unsigned, bool>> Regs,
634 unsigned NumRegs = Regs.size();
648 if (isThumb1 && ContainsReg(Regs, Base)) {
688 NewBase = Regs[NumRegs-1].first;
693 // The merged instruction does not exist yet but will use several Regs if
696 for (const std::pair<unsigned, bool> &R : Regs)
730 (!isi32Store(Opcode) || !ContainsReg(Regs, Base));
804 assert(!(ContainsReg(Regs, Base)) && "Thumb1 can't LDM ! with Base in Regs");
827 for (const std::pair<unsigned, bool> &R : Regs)
839 ArrayRef<std::pair<unsigned, bool>> Regs,
845 assert(Regs.size() == 2);
849 MIB.addReg(Regs[0].first, RegState::Define)
850 .addReg(Regs[1].first, RegState::Define);
852 MIB.addReg(Regs[0].first, getKillRegState(Regs[0].second))
853 .addReg(Regs[1].first, getKillRegState(Regs[1].second));
865 SmallVector<std::pair<unsigned, bool>, 8> Regs;
876 Regs.push_back(std::make_pair(Reg, IsKill));
914 Opcode, Pred, PredReg, DL, Regs,
918 Opcode, Pred, PredReg, DL, Regs, Cand.Instrs);