Lines Matching defs:BaseOp

1624   const MachineOperand &BaseOp = MI.getOperand(2);
1625   Register Base = BaseOp.getReg();
1655     MIB.add(Reg0Op).add(Reg1Op).addReg(BaseOp.getReg(), RegState::Define);
1658     MIB.addReg(BaseOp.getReg(), RegState::Define).add(Reg0Op).add(Reg1Op);
1660   MIB.addReg(BaseOp.getReg(), RegState::Kill)
1770   const MachineOperand &BaseOp = MI->getOperand(2);
1771   Register BaseReg = BaseOp.getReg();
1796   bool BaseKill = BaseOp.isKill();
1797   bool BaseUndef = BaseOp.isUndef();
3019   unsigned BaseOp = getBaseOperandIndex(*MI);
3020   MI->getOperand(BaseOp).setReg(NewBaseReg);
3025   const TargetRegisterClass *TRC = TII->getRegClass(MCID, BaseOp, TRI, *MF);
3028   int OldOffset = MI->getOperand(BaseOp + 1).getImm();
3030     MI->getOperand(BaseOp + 1).setImm(OldOffset - Offset);
3160     int BaseOp = getBaseOperandIndex(Use);
3161     if (BaseOp == -1)
3164     if (!Use.getOperand(BaseOp).isReg() ||
3165         Use.getOperand(BaseOp).getReg() != Base)
3169     else if (Use.getOperand(BaseOp + 1).getImm() == 0)
3211     // allowing us to update and subsequent uses of BaseOp reg with the
3218     int BaseOp = getBaseOperandIndex(*PrePostInc);
3219     IncrementOffset = PrePostInc->getOperand(BaseOp+1).getImm();
3239       unsigned BaseOp = getBaseOperandIndex(*Use);
3241                                           Use->getOperand(BaseOp + 1).getImm() -
3289       int BaseOp = getBaseOperandIndex(MI);
3290       if (BaseOp == -1 || !MI.getOperand(BaseOp).isReg())
3293       Register Base = MI.getOperand(BaseOp).getReg();