Lines Matching defs:BaseAccess

3147   MachineInstr *BaseAccess = nullptr;
3151   // Other accesses after BaseAccess that will need to be updated to use the
3170       BaseAccess = &Use;
3177   if (BaseAccess && Increment) {
3178     if (PrePostInc || BaseAccess->getParent() != Increment->getParent())
3188     // Make sure that Increment has no uses before BaseAccess that are not PHI
3192       if (&Use == BaseAccess || (Use.getOpcode() != TargetOpcode::PHI &&
3193                                  !DT->dominates(BaseAccess, &Use))) {
3194         LLVM_DEBUG(dbgs() << "  BaseAccess doesn't dominate use of increment\n");
3202         BaseAccess->getOpcode(), IncrementOffset > 0 ? ARM_AM::add : ARM_AM::sub);
3209     // If we already have a pre/post index load/store then set BaseAccess,
3220     BaseAccess = PrePostInc;
3227   // other offsets after the BaseAccess. We rely on either
3228   // dominates(BaseAccess, OtherAccess) or dominates(OtherAccess, BaseAccess)
3237     if (DT->dominates(BaseAccess, Use)) {
3247     } else if (!DT->dominates(Use, BaseAccess)) {
3259     // Replace BaseAccess with a post inc
3260     LLVM_DEBUG(dbgs() << "Changing: "; BaseAccess->dump());
3264         createPostIncLoadStore(BaseAccess, IncrementOffset, NewBaseReg, TII, TRI);
3265     BaseAccess->eraseFromParent();