Lines Matching defs:XOR
420 setOperationAction(ISD::XOR, MVT::v2i64, Legal);
480 setOperationAction(ISD::XOR, MVT::v2i1, Expand);
1600 {ISD::ADD, ISD::SUB, ISD::MUL, ISD::AND, ISD::OR, ISD::XOR});
4138 SDValue XOR = DAG.getNode(ISD::XOR, dl, VTy, SRA, Operand);
4140 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy));
4157 SDValue XORHi = DAG.getNode(ISD::XOR, dl, VTy, SRAHi, Hi);
5450 SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV,
6076 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask,
10304 case ISD::VECREDUCE_XOR: BaseOpcode = ISD::XOR; break;
13445 if (N->getOperand(0).getOpcode() != ISD::XOR)
13447 SDValue XOR = N->getOperand(0);
13449 // Check if the XOR's RHS is either a 1, or a BUILD_VECTOR of 1s.
13453 isConstOrConstSplat(XOR->getOperand(1), /*AllowUndefs*/ false,
13459 SDValue Cond = XOR->getOperand(0);
13820 N1->getOpcode() != ISD::OR && N1->getOpcode() != ISD::XOR)
13841 assert(N->getOpcode() == ISD::XOR &&
13844 "Expected XOR(SHIFT) pattern");
13949 case ISD::XOR:
13968 N->getOpcode() != ISD::XOR && N->getOpcode() != ISD::AND)
15414 return DCI.DAG.getNode(ISD::XOR, dl, VT, X, C);
18188 case ISD::XOR: {
18894 case ISD::XOR: return PerformXORCombine(N, DCI, Subtarget);