Lines Matching defs:SrcVT

6043   EVT SrcVT = Tmp1.getValueType();
6060     if (SrcVT == MVT::f32) {
6094   if (SrcVT == MVT::f64)
6257   EVT SrcVT = Op.getValueType();
6260   if ((SrcVT == MVT::i16 || SrcVT == MVT::i32) &&
6266       (SrcVT == MVT::f16 || SrcVT == MVT::bf16))
6269         MoveFromHPR(SDLoc(N), DAG, MVT::i32, SrcVT.getSimpleVT(), Op));
6271   if (!(SrcVT == MVT::i64 || DstVT == MVT::i64))
6275   if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) {
6287   if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
6289     if (DAG.getDataLayout().isBigEndian() && SrcVT.isVector() &&
6290         SrcVT.getVectorNumElements() > 1)
6293                         DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op));
8265     EVT SrcVT = Src.ShuffleVec.getValueType();
8267     uint64_t SrcVTSize = SrcVT.getFixedSizeInBits();
8274     EVT EltVT = SrcVT.getVectorElementType();
18578     EVT SrcVT = Src.getValueType();
18579     if (SrcVT.getScalarSizeInBits() == DstVT.getScalarSizeInBits())
18590   EVT SrcVT = Src.getValueType();
18594       SrcVT.getScalarSizeInBits() <= DstVT.getScalarSizeInBits() &&
19216 bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
19217   if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
19220   unsigned SrcBits = SrcVT.getSizeInBits();
20922     MVT SrcVT = (Sz == 16 ? MVT::f16 : MVT::f32);
20933       LC = RTLIB::getFPEXT(SrcVT, DstVT);
20948   EVT SrcVT = SrcVal.getValueType();
20951   const unsigned SrcSz = SrcVT.getSizeInBits();
20966   RTLIB::Libcall LC = RTLIB::getFPROUND(SrcVT, DstVT);
21255 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,