Lines Matching defs:QOpcodes0

216                  const uint16_t *DOpcodes, const uint16_t *QOpcodes0,
224                  const uint16_t *DOpcodes, const uint16_t *QOpcodes0,
310                     const uint16_t *QOpcodes0 = nullptr,
2117                                 const uint16_t *QOpcodes0,
2180                     QOpcodes0[OpcodeIndex]);
2212     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2259                                 const uint16_t *QOpcodes0,
2339                     QOpcodes0[OpcodeIndex]);
2385   SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,
2956                                    const uint16_t *QOpcodes0,
3024                  : (NumVecs == 1) ? QOpcodes0[OpcodeIndex]
3045     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, ResTy,
4373     static const uint16_t QOpcodes0[] = { ARM::VLD2DUPq8EvenPseudo,
4379     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 2, DOpcodes, QOpcodes0, QOpcodes1);
4388     static const uint16_t QOpcodes0[] = { ARM::VLD3DUPq8EvenPseudo,
4394     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4403     static const uint16_t QOpcodes0[] = { ARM::VLD4DUPq8EvenPseudo,
4409     SelectVLDDup(N, /* IsIntrinsic= */ false, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4453     static const uint16_t QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
4459     SelectVLD(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4468       static const uint16_t QOpcodes0[] = {ARM::VLD4q8Pseudo_UPD,
4474       SelectVLD(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4510       static const uint16_t QOpcodes0[] = {
4516       SelectVLD(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4527       static const uint16_t QOpcodes0[] = {
4533       SelectVLD(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4601     static const uint16_t QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
4607     SelectVST(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4616       static const uint16_t QOpcodes0[] = {ARM::VST4q8Pseudo_UPD,
4622       SelectVST(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4650       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowTPseudo_UPD,
4658       SelectVST(N, true, 3, DOpcodes, QOpcodes0, QOpcodes1);
4670       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowQPseudo_UPD,
4678       SelectVST(N, true, 4, DOpcodes, QOpcodes0, QOpcodes1);
4876       static const uint16_t QOpcodes0[] = { ARM::VLD1q8LowTPseudo_UPD,
4884       SelectVLD(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
4893       static const uint16_t QOpcodes0[] = { ARM::VLD1q8LowQPseudo_UPD,
4901       SelectVLD(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
4919       static const uint16_t QOpcodes0[] = { ARM::VLD3q8Pseudo_UPD,
4925       SelectVLD(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
4934       static const uint16_t QOpcodes0[] = { ARM::VLD4q8Pseudo_UPD,
4940       SelectVLD(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
4947       static const uint16_t QOpcodes0[] = { ARM::VLD2DUPq8EvenPseudo,
4954                    DOpcodes, QOpcodes0, QOpcodes1);
4963       static const uint16_t QOpcodes0[] = { ARM::VLD3DUPq8EvenPseudo,
4970                    DOpcodes, QOpcodes0, QOpcodes1);
4979       static const uint16_t QOpcodes0[] = { ARM::VLD4DUPq8EvenPseudo,
4986                    DOpcodes, QOpcodes0, QOpcodes1);
5045       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowTPseudo_UPD,
5053       SelectVST(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
5062       static const uint16_t QOpcodes0[] = { ARM::VST1q8LowQPseudo_UPD,
5070       SelectVST(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);
5088       static const uint16_t QOpcodes0[] = { ARM::VST3q8Pseudo_UPD,
5094       SelectVST(N, false, 3, DOpcodes, QOpcodes0, QOpcodes1);
5103       static const uint16_t QOpcodes0[] = { ARM::VST4q8Pseudo_UPD,
5109       SelectVST(N, false, 4, DOpcodes, QOpcodes0, QOpcodes1);