Lines Matching defs:MIB
234 const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
236 const MachineInstrBuilder &MIB,
279 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
280 MachineInstr *MI = &*MIB;
286 MIB.add(predOps(ARMCC::AL));
292 MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
293 return MIB;
572 MachineInstrBuilder MIB;
575 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc),
578 MIB.addImm(Id);
579 AddOptionalDefs(MIB);
583 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
587 AddOptionalDefs(MIB);
593 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
597 AddOptionalDefs(MIB);
605 MachineInstrBuilder MIB;
608 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
613 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
618 AddOptionalDefs(MIB);
853 const MachineInstrBuilder &MIB,
869 MIB.addFrameIndex(FI);
875 MIB.addReg(0);
876 MIB.addImm(Imm);
878 MIB.addImm(Addr.Offset);
880 MIB.addMemOperand(MMO);
883 MIB.addReg(Addr.Base.Reg);
889 MIB.addReg(0);
890 MIB.addImm(Imm);
892 MIB.addImm(Addr.Offset);
895 AddOptionalDefs(MIB);
988 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
990 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOLoad, useAM3);
1128 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
1131 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOStore, useAM3);
1438 MachineInstrBuilder MIB;
1439 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II)
1444 MIB.addImm(Imm);
1445 AddOptionalDefs(MIB);
2166 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
2168 AddOptionalDefs(MIB);
2170 MIB.addReg(R, RegState::Implicit);
2263 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2267 MIB.add(predOps(ARMCC::AL));
2271 MIB.addReg(CalleeReg);
2273 MIB.addExternalSymbol(TLI.getLibcallName(Call));
2277 MIB.addReg(R, RegState::Implicit);
2281 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2288 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2404 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2409 MIB.add(predOps(ARMCC::AL));
2413 MIB.addReg(CalleeReg);
2415 MIB.addGlobalAddress(GV, 0, 0);
2417 MIB.addExternalSymbol(IntrMemName, 0);
2421 MIB.addReg(R, RegState::Implicit);
2425 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2433 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2728 MachineInstrBuilder MIB = BuildMI(
2731 MIB.addReg(ARM::CPSR, RegState::Define);
2733 MIB.addReg(SrcReg, isKill * RegState::Kill)
2737 MIB.add(condCodeOp());
2809 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
2814 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm));
2816 MIB.addReg(Reg2);
2817 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0));
2820 AddOptionalDefs(MIB);
2974 MachineInstrBuilder MIB =
2979 MIB.addImm(0);
2980 MIB.add(predOps(ARMCC::AL));
2987 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(Opc), DestReg)
2992 MIB.add(predOps(ARMCC::AL));
2996 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
3001 AddOptionalDefs(MIB);