Lines Matching defs:DestVT

200     unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1737   EVT DestVT = TLI.getValueType(DL, I->getType(), true);
1741   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
1953         MVT DestVT = VA.getLocVT();
1954         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
1956         ArgVT = DestVT;
1962         MVT DestVT = VA.getLocVT();
1963         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);
1965         ArgVT = DestVT;
2040       MVT DestVT = RVLocs[0].getValVT();
2041       const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);
2128     MVT DestVT = VA.getValVT();
2130     if (RVVT != DestVT) {
2134       assert(DestVT == MVT::i32 && "ARM should always ext to i32");
2139         SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());
2588   EVT SrcVT, DestVT;
2590   DestVT = TLI.getValueType(DL, I->getType(), true);
2594   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
2606 unsigned ARMFastISel::ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
2608   if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)
2680   unsigned DestBits = DestVT.getSizeInBits();
2763   MVT DestVT = DestEVT.getSimpleVT();
2764   unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);
2778   EVT DestVT = TLI.getValueType(DL, I->getType(), true);
2779   if (DestVT != MVT::i32)