Lines Matching defs:CPSR

233     bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
244 // default CCReg argument. Sets CPSR if we're setting CPSR instead of CCR.
245 bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) {
249   // Look to see if our OptionalDef is defining CPSR or CCR.
252     if (MO.getReg() == ARM::CPSR)
253       *CPSR = true;
276 // CPSR defs that need to be added before the remaining operands. See s_cc_out
289   // defines CPSR. All other OptionalDefines in ARM are the CCR register.
290   bool CPSR = false;
291   if (DefinesOptionalPredicate(MI, &CPSR))
292     MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
1254       .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1277       .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1315                   .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1477   // ARMEmitCmp emits a FMSTAT when necessary, so it's always safe to use CPSR.
1480           .addImm(ARMPred).addReg(ARM::CPSR);
1664         .addReg(ARM::CPSR);
1672         .addReg(ARM::CPSR);
2703   // 16-bit Thumb instructions always set CPSR (unless they're in an IT block).
2715   // CPSR is set only by 16-bit Thumb instructions.
2731       MIB.addReg(ARM::CPSR, RegState::Define);