Lines Matching defs:DstIsDead

566   bool DstIsDead = MI.getOperand(OpIdx).isDead();
590     MIB.addReg(DstRegPair, RegState::Define | getDeadRegState(DstIsDead));
594     MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
596       MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
598       MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
600       MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
659   MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
774   bool DstIsDead = false;
776     DstIsDead = MI.getOperand(OpIdx).isDead();
779     MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead));
781       MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
783       MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead));
785       MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead));
827     MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
997   bool DstIsDead = MI.getOperand(0).isDead();
1054   (--MBBI)->getOperand(0).setIsDead(DstIsDead);
1066   bool DstIsDead = MI.getOperand(0).isDead();
1085           .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
1092           .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
1140                .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
1149     LO16->getOperand(0).setIsDead(DstIsDead);
2622       bool DstIsDead = MI.getOperand(0).isDead();
2629           .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
2644       bool DstIsDead = MI.getOperand(0).isDead();
2688             .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
2705       bool DstIsDead = MI.getOperand(0).isDead();
2730         .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead))
2782       bool DstIsDead = MI.getOperand(OpIdx).isDead();
2795       MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead))
2796         .addReg(D1, RegState::Define | getDeadRegState(DstIsDead));
2799       MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));