Lines Matching defs:Br
270 bool fixupImmediateBr(ImmBranch &Br);
271 bool fixupConditionalBr(ImmBranch &Br);
272 bool fixupUnconditionalBr(ImmBranch &Br);
1705 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) {
1706 MachineInstr *MI = Br.MI;
1710 if (BBUtils->isBBInRange(MI, DestBB, Br.MaxDisp))
1713 if (!Br.isCond)
1714 return fixupUnconditionalBr(Br);
1715 return fixupConditionalBr(Br);
1723 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) {
1724 MachineInstr *MI = Br.MI;
1733 Br.MaxDisp = (1 << 21) * 2;
1749 ARMConstantIslands::fixupConditionalBr(ImmBranch &Br) {
1750 MachineInstr *MI = Br.MI;
1774 BMI->getOpcode() == Br.UncondBr) {
1783 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) {
1820 Br.MI = &MBB->back();
1823 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr))
1827 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB);
1829 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1830 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1894 auto TryShrinkBranch = [this](ImmBranch &Br) {
1895 unsigned Opcode = Br.MI->getOpcode();
1914 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1915 if (BBUtils->isBBInRange(Br.MI, DestBB, MaxOffs)) {
1916 LLVM_DEBUG(dbgs() << "Shrink branch: " << *Br.MI);
1917 Br.MI->setDesc(TII->get(NewOpc));
1918 MachineBasicBlock *MBB = Br.MI->getParent();
1933 auto FindCmpForCBZ = [this](ImmBranch &Br, ImmCompare &ImmCmp,
1940 if (!Br.MI->killsRegister(ARM::CPSR, /*TRI=*/nullptr))
1945 ARMCC::CondCodes Pred = getInstrPredicate(*Br.MI, PredReg);
1955 unsigned BrOffset = BBUtils->getOffsetOf(Br.MI) + 4 - 2;
1963 MachineInstr *CmpMI = findCMPToFoldIntoCBZ(Br.MI, TRI);
1972 auto TryConvertToLE = [this](ImmBranch &Br, ImmCompare &Cmp) {
1973 if (Br.MI->getOpcode() != ARM::t2Bcc || !STI->hasLOB() ||
1977 MachineBasicBlock *MBB = Br.MI->getParent();
1978 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1980 !BBUtils->isBBInRange(Br.MI, DestBB, 4094))
1987 // target of Br. So now we need to reverse the condition.
1990 MachineInstrBuilder MIB = BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(),
1993 MIB.add(Br.MI->getOperand(0));
1994 Br.MI->eraseFromParent();
1995 Br.MI = MIB;
2007 for (ImmBranch &Br : reverse(ImmBranches)) {
2008 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
2009 MachineBasicBlock *MBB = Br.MI->getParent();
2010 MachineBasicBlock *ExitBB = &MBB->back() == Br.MI ?
2015 if (FindCmpForCBZ(Br, Cmp, ExitBB) && TryConvertToLE(Br, Cmp)) {
2019 FindCmpForCBZ(Br, Cmp, DestBB);
2020 MadeChange |= TryShrinkBranch(Br);
2023 unsigned Opcode = Br.MI->getOpcode();
2032 MachineBasicBlock::iterator KillMI = Br.MI;
2044 LLVM_DEBUG(dbgs() << "Fold: " << *Cmp.MI << " and: " << *Br.MI);
2046 BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(), TII->get(Cmp.NewOpc))
2049 .addMBB(DestBB, Br.MI->getOperand(0).getTargetFlags());
2053 if (Br.MI->getOpcode() == ARM::tBcc) {
2054 Br.MI->eraseFromParent();
2055 Br.MI = NewBR;