Lines Matching defs:DDst

5152     // Source instruction is %DDst = VMOVD %DSrc, 14, %noreg (; implicits)
5159     // Change to a %DDst = VORRd %DSrc, %DSrc, 14, %noreg (; implicits)
5211     // Convert to %DDst = VSETLNi32 %DDst, %RSrc, Lane, 14, %noreg (; imps)
5212     // Again DDst may be undefined at the beginning of this instruction.
5235       unsigned DstLane = 0, SrcLane = 0, DDst, DSrc;
5236       DDst = getCorrespondingDRegAndLane(TRI, DstReg, DstLane);
5246       if (DSrc == DDst) {
5248         //     %DDst = VDUPLN32d %DDst, Lane, 14, %noreg (; implicits)
5250         MIB.addReg(DDst, RegState::Define)
5251             .addReg(DDst, getUndefRegState(!MI.readsRegister(DDst, TRI)))
5275       //     %DDst = VEXTd32 %DSrc1, %DSrc2, Lane, 14, %noreg (;implicits)
5278                        DDst);
5280       // On the first instruction, both DSrc and DDst may be undef if present.
5283       unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst;
5287       CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst;
5297       MIB.addReg(DDst, RegState::Define);
5299       // On the second instruction, DDst has definitely been defined above, so
5301       CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst;
5305       CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst;