Lines Matching defs:Add
79 // Returns true if result of \p Add is not used before \p Ldst
80 bool noUseOfAddBeforeLoadOrStore(const MachineInstr *Add,
91 // Check if instructions \p Ldst and \p Add can be moved to become adjacent
95 MachineInstr *canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add,
192 bool ARCOptAddrMode::noUseOfAddBeforeLoadOrStore(const MachineInstr *Add,
194 Register R = Add->getOperand(0).getReg();
230 for (auto &Add : MRI->use_nodbg_instructions(B)) {
232 if (!isAddConstantOp(Add, Incr))
238 MachineInstr *MoveTo = canJoinInstructions(&Ldst, &Add, &Uses);
243 if (!canFixPastUses(Uses, Add.getOperand(2), B))
246 LLVM_DEBUG(MachineInstr *First = &Ldst; MachineInstr *Last = &Add;
254 if (MoveTo == &Add) {
256 Add.getParent()->insertAfter(Add.getIterator(), &Ldst);
258 if (Result == &Add)
265 unsigned NewBaseReg = Add.getOperand(0).getReg();
266 changeToAddrMode(Ldst, NewOpcode, NewBaseReg, Add.getOperand(2));
267 Add.eraseFromParent();
275 ARCOptAddrMode::canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add,
277 assert(Ldst && Add && "NULL instruction passed");
279 MachineInstr *First = Add;
281 if (MDT->dominates(Ldst, Add))
283 else if (!MDT->dominates(Add, Ldst))
307 if (Add->getOperand(0).getReg() == StReg || BaseReg == StReg) {
308 LLVM_DEBUG(dbgs() << "[canJoinInstructions] Store uses result of Add\n");
316 if (&MI == Ldst || &MI == Add)
318 if (&MI != Add && MDT->dominates(Ldst, &MI))
322 if (MDT->dominates(Add, &MI))
328 if (First == Add) {
335 LLVM_DEBUG(dbgs() << "[canJoinInstructions] Can sink Add down to Ldst\n");
336 } else if (canHoistLoadStoreTo(Ldst, Add)) {
338 LLVM_DEBUG(dbgs() << "[canJoinInstructions] Can hoist Ldst to Add\n");
345 LLVM_DEBUG(dbgs() << "[canJoinInstructions] Can hoist Add to Ldst\n");