Lines Matching defs:Val
60 auto Val = mdconst::dyn_extract<ConstantInt>(Tuple->getOperand(I + 1));
61 if (!Key || !Val)
63 setRegister(Key->getZExtValue(), Val->getZExtValue());
137 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, unsigned Val) {
138 setRegister(getRsrc1Reg(CC), Val);
141 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, const MCExpr *Val,
143 setRegister(getRsrc1Reg(CC), Val, Ctx);
148 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, unsigned Val) {
149 setRegister(getRsrc1Reg(CC) + 1, Val);
152 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, const MCExpr *Val,
154 setRegister(getRsrc1Reg(CC) + 1, Val, Ctx);
159 void AMDGPUPALMetadata::setSpiPsInputEna(unsigned Val) {
160 setRegister(PALMD::R_A1B3_SPI_PS_INPUT_ENA, Val);
165 void AMDGPUPALMetadata::setSpiPsInputAddr(unsigned Val) {
166 setRegister(PALMD::R_A1B4_SPI_PS_INPUT_ADDR, Val);
183 void AMDGPUPALMetadata::setRegister(unsigned Reg, unsigned Val) {
192 Val |= N.getUInt();
193 N = N.getDocument()->getNode(Val);
198 void AMDGPUPALMetadata::setRegister(unsigned Reg, const MCExpr *Val,
210 Val = MCBinaryExpr::createOr(Val, ExprIt->getSecond(), Ctx);
216 Val = MCBinaryExpr::createOr(Val, NExpr, Ctx);
218 ExprIt->getSecond() = Val;
221 Val = MCBinaryExpr::createOr(Val, NExpr, Ctx);
223 if (!Val->evaluateAsAbsolute(Unused))
224 REM[Reg] = Val;
227 DelayedExprs.assignDocNode(N, msgpack::Type::UInt, Val);
242 void AMDGPUPALMetadata::setNumUsedVgprs(CallingConv::ID CC, unsigned Val) {
248 setRegister(NumUsedVgprsKey, Val);
252 getHwStage(CC)[".vgpr_count"] = MsgPackDoc.getNode(Val);
255 void AMDGPUPALMetadata::setNumUsedVgprs(CallingConv::ID CC, const MCExpr *Val,
262 setRegister(NumUsedVgprsKey, Val, Ctx);
266 setHwStage(CC, ".vgpr_count", msgpack::Type::UInt, Val);
270 void AMDGPUPALMetadata::setNumUsedAgprs(CallingConv::ID CC, unsigned Val) {
271 getHwStage(CC)[".agpr_count"] = Val;
274 void AMDGPUPALMetadata::setNumUsedAgprs(unsigned CC, const MCExpr *Val) {
275 setHwStage(CC, ".agpr_count", msgpack::Type::UInt, Val);
281 void AMDGPUPALMetadata::setNumUsedSgprs(CallingConv::ID CC, unsigned Val) {
287 setRegister(NumUsedSgprsKey, Val);
291 getHwStage(CC)[".sgpr_count"] = MsgPackDoc.getNode(Val);
294 void AMDGPUPALMetadata::setNumUsedSgprs(unsigned CC, const MCExpr *Val,
301 setRegister(NumUsedSgprsKey, Val, Ctx);
305 setHwStage(CC, ".sgpr_count", msgpack::Type::UInt, Val);
309 void AMDGPUPALMetadata::setScratchSize(CallingConv::ID CC, unsigned Val) {
312 setRegister(getScratchSizeKey(CC), Val);
316 getHwStage(CC)[".scratch_memory_size"] = MsgPackDoc.getNode(Val);
319 void AMDGPUPALMetadata::setScratchSize(unsigned CC, const MCExpr *Val,
323 setRegister(getScratchSizeKey(CC), Val, Ctx);
327 setHwStage(CC, ".scratch_memory_size", msgpack::Type::UInt, Val);
331 void AMDGPUPALMetadata::setFunctionScratchSize(StringRef FnName, unsigned Val) {
333 Node[".stack_frame_size_in_bytes"] = MsgPackDoc.getNode(Val);
334 Node[".backend_stack_size"] = MsgPackDoc.getNode(Val);
338 void AMDGPUPALMetadata::setFunctionLdsSize(StringRef FnName, unsigned Val) {
340 Node[".lds_size"] = MsgPackDoc.getNode(Val);
345 unsigned Val) {
347 Node[".vgpr_count"] = MsgPackDoc.getNode(Val);
351 const MCExpr *Val) {
353 DelayedExprs.assignDocNode(Node[".vgpr_count"], msgpack::Type::UInt, Val);
358 unsigned Val) {
360 Node[".sgpr_count"] = MsgPackDoc.getNode(Val);
364 const MCExpr *Val) {
366 DelayedExprs.assignDocNode(Node[".sgpr_count"], msgpack::Type::UInt, Val);
777 unsigned Val = I->second.getUInt();
778 Stream << "0x" << Twine::utohexstr(Reg) << ",0x" << Twine::utohexstr(Val);
858 uint64_t Val;
859 if (S.consumeInteger(0, Val)) {
864 Key = MsgPackDoc.getNode(uint64_t(Val));
1045 void AMDGPUPALMetadata::setHwStage(unsigned CC, StringRef field, unsigned Val) {
1046 getHwStage(CC)[field] = Val;
1049 void AMDGPUPALMetadata::setHwStage(unsigned CC, StringRef field, bool Val) {
1050 getHwStage(CC)[field] = Val;
1054 msgpack::Type Type, const MCExpr *Val) {
1055 DelayedExprs.assignDocNode(getHwStage(CC)[field], Type, Val);
1058 void AMDGPUPALMetadata::setComputeRegisters(StringRef field, unsigned Val) {
1059 getComputeRegisters()[field] = Val;
1062 void AMDGPUPALMetadata::setComputeRegisters(StringRef field, bool Val) {
1063 getComputeRegisters()[field] = Val;
1072 bool AMDGPUPALMetadata::checkComputeRegisters(StringRef field, unsigned Val) {
1074 return N->getUInt() == Val;
1078 bool AMDGPUPALMetadata::checkComputeRegisters(StringRef field, bool Val) {
1080 return N->getBool() == Val;
1084 void AMDGPUPALMetadata::setGraphicsRegisters(StringRef field, unsigned Val) {
1085 getGraphicsRegisters()[field] = Val;
1088 void AMDGPUPALMetadata::setGraphicsRegisters(StringRef field, bool Val) {
1089 getGraphicsRegisters()[field] = Val;
1093 unsigned Val) {
1094 getGraphicsRegisters()[field1].getMap(true)[field2] = Val;
1098 bool Val) {
1099 getGraphicsRegisters()[field1].getMap(true)[field2] = Val;