Lines Matching defs:If
65 /// iteration. If %a is a VGPR that is unused after the loop, it does not need
109 collectCandidateRegisters(MachineBasicBlock *If, MachineBasicBlock *Flow,
123 void updateLiveRangeInThenRegion(Register Reg, MachineBasicBlock *If,
132 optimizeLiveRange(Register Reg, MachineBasicBlock *If,
223 MachineBasicBlock *If, MachineBasicBlock *Flow, MachineBasicBlock *Endif,
249 if ((VI.AliveBlocks.test(If->getNumber()) || DefMBB == If) &&
250 Loops->getLoopFor(DefMBB) == Loops->getLoopFor(If)) {
251 // Check if the register is live into the endif block. If not,
294 if ((VI.AliveBlocks.test(If->getNumber()) || DefMBB == If) &&
295 Loops->getLoopFor(DefMBB) == Loops->getLoopFor(If))
312 // The register is live through the path If->Flow or Flow->Endif.
314 if ((UseMBB == Flow && IncomingMBB != If) ||
373 // If the variable is used after the loop, the register coalescer will
401 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow) const {
403 SmallVector<MachineBasicBlock *> WorkList({If});
500 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow,
512 if (Pred == If)
549 updateLiveRangeInThenRegion(Reg, If, Flow);