Lines Matching defs:MBB
111 bool removeMBBifRedundant(MachineBasicBlock &MBB);
119 skipIgnoreExecInstsTrivialSucc(MachineBasicBlock &MBB,
124 skipToUncondBrOrEnd(MachineBasicBlock &MBB,
129 MachineBasicBlock::iterator End = MBB.end();
182 MachineBasicBlock *MBB = Worklist.pop_back_val();
184 if (MBB == End || !Visited.insert(MBB).second)
186 if (KillBlocks.contains(MBB))
189 Worklist.append(MBB->succ_begin(), MBB->succ_end());
208 MachineBasicBlock &MBB = *MI.getParent();
235 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg)
243 BuildMI(MBB, I, DL, TII->get(AndOpc), Tmp)
254 BuildMI(MBB, I, DL, TII->get(XorOpc), SaveExecReg)
263 BuildMI(MBB, I, DL, TII->get(MovTermOpc), Exec)
270 I = skipToUncondBrOrEnd(MBB, I);
274 MachineInstr *NewBr = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
306 MachineBasicBlock &MBB = *MI.getParent();
312 MachineBasicBlock::iterator Start = MBB.begin();
318 BuildMI(MBB, Start, DL, TII->get(OrSaveExecOpc), SaveReg)
329 MachineInstr *And = BuildMI(MBB, ElsePt, DL, TII->get(AndOpc), DstReg)
334 BuildMI(MBB, ElsePt, DL, TII->get(XorTermrOpc), Exec)
340 ElsePt = skipToUncondBrOrEnd(MBB, ElsePt);
343 BuildMI(MBB, ElsePt, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ))
369 MachineBasicBlock &MBB = *MI.getParent();
391 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg)
396 Or = BuildMI(MBB, &MI, DL, TII->get(OrOpc), Dst)
400 Or = BuildMI(MBB, &MI, DL, TII->get(OrOpc), Dst)
423 MachineBasicBlock &MBB = *MI.getParent();
427 BuildMI(MBB, &MI, DL, TII->get(Andn2TermOpc), Exec)
433 auto BranchPt = skipToUncondBrOrEnd(MBB, MI.getIterator());
435 BuildMI(MBB, BranchPt, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
449 MachineBasicBlock &MBB, MachineBasicBlock::iterator It) const {
452 MachineBasicBlock *B = &MBB;
455 return MBB.end();
467 return MBB.end();
478 MachineBasicBlock &MBB = *MI.getParent();
481 MachineBasicBlock::iterator InsPt = MBB.begin();
497 MachineBasicBlock *SplitBB = &MBB;
499 SplitBB = MBB.splitAt(MI, /*UpdateLiveIns*/true, LIS);
500 if (MDT && SplitBB != &MBB) {
501 MachineDomTreeNode *MBBNode = (*MDT)[&MBB];
504 MachineDomTreeNode *SplitBBNode = MDT->addNewBlock(SplitBB, &MBB);
513 BuildMI(MBB, InsPt, DL, TII->get(Opcode), Exec)
519 if (SplitBB != &MBB) {
526 for (MachineBasicBlock *BlockPiece : {&MBB, SplitBB}) {
539 if (VI.AliveBlocks.test(MBB.getNumber()))
544 VI.AliveBlocks.set(MBB.getNumber());
625 MachineBasicBlock &MBB = *MI->getParent();
627 skipIgnoreExecInstsTrivialSucc(MBB, std::next(MI->getIterator()));
628 if (Next == MBB.end() || !LoweredEndCf.count(&*Next))
647 removeMBBifRedundant(MBB);
653 MachineBasicBlock &MBB = *MI.getParent();
655 MachineInstr *Prev = (I != MBB.begin()) ? &*(std::prev(I)) : nullptr;
657 MachineBasicBlock *SplitBB = &MBB;
690 for (I = Prev ? Prev->getIterator() : MBB.begin(); I != MBB.end(); I = Next) {
702 I = MBB.end();
710 bool SILowerControlFlow::removeMBBifRedundant(MachineBasicBlock &MBB) {
711 for (auto &I : MBB.instrs()) {
716 assert(MBB.succ_size() == 1 && "MBB has more than one successor");
718 MachineBasicBlock *Succ = *MBB.succ_begin();
721 while (!MBB.predecessors().empty()) {
722 MachineBasicBlock *P = *MBB.pred_begin();
723 if (P->getFallThrough(false) == &MBB)
725 P->ReplaceUsesOfBlockWith(&MBB, Succ);
727 MBB.removeSuccessor(Succ);
729 for (auto &I : MBB.instrs())
733 // If Succ, the single successor of MBB, is dominated by MBB, MDT needs
734 // updating by changing Succ's idom to the one of MBB; otherwise, MBB must
736 if (MDT->dominates(&MBB, Succ))
738 MDT->getNode(&MBB)->getIDom());
739 MDT->eraseNode(&MBB);
741 MBB.clear();
742 MBB.eraseFromParent();
799 for (auto &MBB : MF) {
801 for (auto &Term : MBB.terminators()) {
803 KillBlocks.insert(&MBB);
809 for (auto &MI : MBB) {
811 KillBlocks.insert(&MBB);
823 MachineBasicBlock *MBB = &*BI;
826 E = MBB->end();
827 for (I = MBB->begin(); I != E; I = Next) {
830 MachineBasicBlock *SplitMBB = MBB;
844 if (SplitMBB != MBB) {
845 MBB = Next->getParent();
846 E = MBB->end();