Lines Matching defs:VRC
5644 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC);
5645 Register Reg = MRI.createVirtualRegister(VRC);
6059 const TargetRegisterClass *VRC = MRI.getRegClass(SrcReg);
6060 const TargetRegisterClass *SRC = RI.getEquivalentSGPRClass(VRC);
6062 unsigned SubRegs = RI.getRegSizeInBits(*VRC) / 32;
6064 if (RI.hasAGPRs(VRC)) {
6065 VRC = RI.getEquivalentVGPRClass(VRC);
6066 Register NewSrcReg = MRI.createVirtualRegister(VRC);
6588 const TargetRegisterClass *RC = nullptr, *SRC = nullptr, *VRC = nullptr;
6595 VRC = OpRC;
6604 if (VRC || !RI.isSGPRClass(getOpRegClass(MI, 0))) {
6605 if (!VRC) {
6608 VRC = &AMDGPU::VReg_1RegClass;
6610 VRC = RI.isAGPRClass(getOpRegClass(MI, 0))
6614 VRC = RI.isAGPRClass(getOpRegClass(MI, 0))
6615 ? RI.getEquivalentAGPRClass(VRC)
6616 : RI.getEquivalentVGPRClass(VRC);
6618 RC = VRC;
6655 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC);
6656 if (VRC == OpRC)
6659 legalizeGenericOperand(*MBB, MI, VRC, Op, MRI, MI.getDebugLoc());