Lines Matching full:let
159 let TSFlags{0} = SALU;
160 let TSFlags{1} = VALU;
162 let TSFlags{2} = SOP1;
163 let TSFlags{3} = SOP2;
164 let TSFlags{4} = SOPC;
165 let TSFlags{5} = SOPK;
166 let TSFlags{6} = SOPP;
168 let TSFlags{7} = VOP1;
169 let TSFlags{8} = VOP2;
170 let TSFlags{9} = VOPC;
171 let TSFlags{10} = VOP3;
172 let TSFlags{12} = VOP3P;
174 let TSFlags{13} = VINTRP;
175 let TSFlags{14} = SDWA;
176 let TSFlags{15} = DPP;
177 let TSFlags{16} = TRANS;
179 let TSFlags{17} = MUBUF;
180 let TSFlags{18} = MTBUF;
181 let TSFlags{19} = SMRD;
182 let TSFlags{20} = MIMG;
183 let TSFlags{21} = VIMAGE;
184 let TSFlags{22} = VSAMPLE;
185 let TSFlags{23} = EXP;
186 let TSFlags{24} = FLAT;
187 let TSFlags{25} = DS;
189 let TSFlags{26} = Spill;
192 let TSFlags{27} = 0;
194 let TSFlags{28} = LDSDIR;
195 let TSFlags{29} = VINTERP;
197 let TSFlags{32} = VM_CNT;
198 let TSFlags{33} = EXP_CNT;
199 let TSFlags{34} = LGKM_CNT;
201 let TSFlags{35} = WQM;
202 let TSFlags{36} = DisableWQM;
203 let TSFlags{37} = Gather4;
206 let TSFlags{38} = 0;
208 let TSFlags{39} = ScalarStore;
209 let TSFlags{40} = FixedSize;
212 let TSFlags{41} = 0;
214 let TSFlags{42} = VOP3_OPSEL;
216 let TSFlags{43} = maybeAtomic;
217 let TSFlags{44} = renamedInGFX9;
219 let TSFlags{45} = FPClamp;
220 let TSFlags{46} = IntClamp;
221 let TSFlags{47} = ClampLo;
222 let TSFlags{48} = ClampHi;
224 let TSFlags{49} = IsPacked;
226 let TSFlags{50} = D16Buf;
228 let TSFlags{51} = FlatGlobal;
230 let TSFlags{52} = FPDPRounding;
232 let TSFlags{53} = FPAtomic;
234 let TSFlags{54} = IsMAI;
236 let TSFlags{55} = IsDOT;
238 let TSFlags{56} = FlatScratch;
240 let TSFlags{57} = IsAtomicNoRet;
242 let TSFlags{58} = IsAtomicRet;
244 let TSFlags{59} = IsWMMA;
246 let TSFlags{60} = TiedSourceNotRead;
248 let TSFlags{61} = IsNeverUniform;
250 let TSFlags{62} = GWS;
252 let TSFlags{63} = IsSWMMAC;
254 let SchedRW = [Write32Bit];
256 let AsmVariantName = AMDGPUAsmVariants.Default;
259 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
264 let isPseudo = 1;
265 let isCodeGenOnly = 1;
270 let SALU = 1;
275 let VALU = 1;
276 let Uses = [EXEC];
283 let Uses = !if(UseExec, [EXEC], []);
284 let Defs = !if(DefExec, [EXEC, SCC], [SCC]);
285 let mayLoad = 0;
286 let mayStore = 0;
287 let hasSideEffects = 0;
315 let EncoderMethod = "getMachineOpValueT16";
316 let DecoderMethod = "DecodeVGPR_16RegisterClass";
320 let EncoderMethod = "getMachineOpValueT16Lo128";
321 let DecoderMethod = "DecodeVGPR_16_Lo128RegisterClass";
330 let Inst{7-0} = vsrc;
331 let Inst{9-8} = attrchan;
332 let Inst{15-10} = attr;
333 let Inst{17-16} = op;
334 let Inst{25-18} = vdst;
335 let Inst{31-26} = 0x32; // encoding
350 let Inst{11-8} = dmask;
351 let Inst{12} = unorm;
352 let Inst{13} = cpol{CPolBit.GLC};
353 let Inst{15} = r128;
354 let Inst{17} = lwe;
355 let Inst{25} = cpol{CPolBit.SLC};
356 let Inst{31-26} = 0x3c;
357 let Inst{47-40} = vdata{7-0};
358 let Inst{52-48} = srsrc{6-2};
359 let Inst{57-53} = ssamp{6-2};
360 let Inst{63} = d16;
367 let Inst{0} = op{7};
368 let Inst{7} = cpol{CPolBit.SCC};
369 let Inst{14} = da;
370 let Inst{16} = tfe;
371 let Inst{24-18} = op{6-0};
372 let Inst{39-32} = vaddr;
379 let Inst{0} = op{7};
380 let Inst{7} = cpol{CPolBit.SCC};
381 let Inst{14} = da;
382 let Inst{16} = vdata{9}; // ACC bit
383 let Inst{24-18} = op{6-0};
384 let Inst{39-32} = vaddr;
393 let Inst{0} = op{7};
394 let Inst{2-1} = nsa;
395 let Inst{5-3} = dim;
396 let Inst{7} = cpol{CPolBit.DLC};
397 let Inst{16} = tfe;
398 let Inst{24-18} = op{6-0};
399 let Inst{39-32} = vaddr0;
400 let Inst{62} = a16;
419 let Inst{0} = nsa;
420 let Inst{4-2} = dim;
421 let Inst{7} = unorm;
422 let Inst{11-8} = dmask;
423 let Inst{12} = cpol{CPolBit.SLC};
424 let Inst{13} = cpol{CPolBit.DLC};
425 let Inst{14} = cpol{CPolBit.GLC};
426 let Inst{15} = r128;
427 let Inst{16} = a16;
428 let Inst{17} = d16;
429 let Inst{25-18} = op;
430 let Inst{31-26} = 0x3c;
431 let Inst{39-32} = vaddr0;
432 let Inst{47-40} = vdata;
433 let Inst{52-48} = srsrc{6-2};
434 let Inst{53} = tfe;
435 let Inst{54} = lwe;
436 let Inst{62-58} = ssamp{6-2};
454 let Inst{2-0} = dim;
455 let Inst{4} = r128;
456 let Inst{5} = d16;
457 let Inst{6} = a16;
458 let Inst{21-14} = op;
459 let Inst{25-22} = dmask;
460 let Inst{39-32} = vdata;
461 let Inst{49-41} = rsrc;
462 let Inst{51-50} = cpol{4-3}; // scope
463 let Inst{54-52} = cpol{2-0}; // th
464 let Inst{71-64} = vaddr0;
465 let Inst{79-72} = vaddr1;
466 let Inst{87-80} = vaddr2;
467 let Inst{95-88} = vaddr3;
475 let Inst{3} = tfe;
476 let Inst{13} = unorm;
477 let Inst{31-26} = 0x39;
478 let Inst{40} = lwe;
479 let Inst{63-55} = samp;
485 let Inst{31-26} = 0x34;
486 let Inst{55} = tfe;
487 let Inst{63-56} = vaddr4;
499 let Inst{3-0} = en;
500 let Inst{9-4} = tgt;
501 let Inst{11} = done;
502 let Inst{31-26} = 0x3e;
503 let Inst{39-32} = src0;
504 let Inst{47-40} = src1;
505 let Inst{55-48} = src2;
506 let Inst{63-56} = src3;
514 let Inst{10} = compr;
515 let Inst{12} = vm;
522 let Inst{13} = row;
525 let Uses = [EXEC] in {
529 let VINTRP = 1;
541 let mayLoad = 0;
542 let mayStore = 0;
543 let hasSideEffects = 0;
544 let VALU = 1;