Lines Matching defs:dmask

1222           // IR type. Check the dmask for the real number of elements loaded.
7966       // Work out the num dwords based on the dmask popcount and underlying type
7976       // Confirm that the return type is large enough for the dmask specified
8131       // Expecting to get an error flag since TFC is on - and dmask is 0
8132       // Force dmask to be at least 1 otherwise the instruction will fail
14828   unsigned DmaskIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::dmask) - 1;
14892   // Don't allow 0 dmask, as hardware assumes one channel enabled.
14899     // If the original dmask has one channel - then nothing to do
14902     // Use an arbitrary dmask - required for the instruction to work
15048       AMDGPU::hasNamedOperand(Opcode, AMDGPU::OpName::dmask)) {
15149     MachineOperand *MO_Dmask = TII->getNamedOperand(MI, AMDGPU::OpName::dmask);
15151     // check that dmask operand is found.
15152     assert(MO_Dmask && "Expected dmask operand in instruction");
15154     unsigned dmask = MO_Dmask->getImm();
15157     unsigned ActiveLanes = TII->isGather4(MI) ? 4 : llvm::popcount(dmask);